Automatic Verification of Finite State Concurrent Systems Edmund M. - - PDF document
Automatic Verification of Finite State Concurrent Systems Edmund M. - - PDF document
Automatic Verification of Finite State Concurrent Systems Edmund M. Clarke, Jr. Computer Science Department Carnegie Mellon University Pittsburgh, PA 15213 1 Temporal Logic Model Checking Specification Language: A propositional temporal
Temporal Logic Model Checking
Specification Language: A propositional temporal logic. Verification Procedure: Exhaustive search of the state space of the concurrent system to determine truth of specification.
- E. M. Clarke and E. A. Emerson. Synthesis of
synchronization skeletons for branching time temporal logic. In Logic of programs: workshop, Yorktown Heights, NY, May 1981, volume 131 of Lecture Notes in Computer Science. Springer-Verlag, 1981.
J.P. Quielle and J. Sifakis. Specification and verification ofconcurrent systems in CESAR. In Proceedings of the Fifth International Symposium in Programming, volume 137 of Lecture Notes in Computer Science. Springer-Verlag, 1981.
2
Why Model Checking?
Advantages:
✁ No proofs!!! ✁ Fast ✁ Counterexamples ✁ No problem with partial specifications ✁ Logics can easily express many concurrency propertiesMain Disadvantage: State Explosion Problem
✁ Too many processes ✁ Data PathsMuch progress recently!!
3
Outline of Talk
- 1. Temporal Logic (CTL
- 2. Model Checking Problem.
- 3. Some Notable Successes.
- 4. Symbolic Model Checking with Binary Decision Diagrams.
- 5. Tomorrow:
Symbolic Model Checking without Binary Decision Diagrams.
- 6. Directions for Future Research.
4
- 1. Temporal Logic
a b b c c a b a b c c c b c State Transition Graph or Kripke Model (Unwind State Graph to obtain Infinite Tree) Infinite Computation Tree
5
Computation Tree Logics
Let
✄be a Kripke Structure, and let
☎be the transition relation for
✄. A path is an infinite sequence of states
✆✞✝✠✟✡✆☞☛✌✟✎✍✏✍✑✍ such that forevery
✒ , ✓✔✆✏✕✖✟✗✆✑✕✙✘ ☛✛✚✢✜ ☎- 1. Path quantifier:
- 2. Temporal Operator:
6
The Logic CTL
✦Two types of formulas in CTL
✧ :- 1. A state formula is either
is a path formula.
- 2. A path formula is either
path formulas.
7
The Logics CTL and LTL
In CTL each of the linear-time operators
✰,
✱ , ✲, and U must be immediately preceded by a path quantifier. Example: AG
✳ EF ✴✶✵In Linear temporal logic (LTL) formulas have the form A
✷where
✷ is a path formula in which the only state subformulas areatomic propositions. Example: A FG
✴8
The Meaning of Path Quantifiers
Let
✸be a Kripke structure,
✹✻✺ be a state of ✸, and
✼ be a pathformula, then
✽ ✸ ✾✿✹ ✺ ❀ ❁E
✼if and only if there exist a path
❂starting at
✹ ✺ ,such that
✸ ✾❃❂ ❀ ❁ ✼ . ✽ ✸ ✾✿✹ ✺ ❀ ❁A
✼ if and only if for all paths ❂starting at
✹ ✺ , wehave
✸ ✾❃❂ ❀ ❁ ✼ .9
Expressive Power
It can be shown that the three logics CTL*, CTL, and LTL have different expressive powers. For example, there is no CTL formula that is equivalent to the LTL formula A
❄ FG ❅❇❆ .Likewise, there is no LTL formula that is equivalent to the CTL formula AG
❄ EF ❅✶❆ .The disjunction A
❄ FG ❅✶❆❉❈AG
❄ EF ❅✶❆ is a CTL ❊ formula that isnot expressible in either CTL or LTL.
10
Basic CTL Operators
This lecture will deal primarily with CTL. The four most widely used CTL operators are illustrated below. Each computation tree has the state
❋✞● as its root.g . . . . . . . . . . . . g . . . . . . . . . . . . g g
❍ ■ ❋✑● ❏ ❑EF
▲ ❍ ■ ❋✑● ❏ ❑AF
▲g . . . . . . . . . . . . g g g . . . . . . . . . . . . g g g g g g
❍ ■ ❋✑● ❏ ❑EG
▲ ❍ ■ ❋✏● ❏ ❑AG
▲11
Typical CTL
▼ formulas ◆ EF ❖✖P❘◗✛❙❯❚❱◗✛❲❨❳ ❩ ❬✬❭ ❲❨❙❪❳❴❫❛❵ : it is possible to get to a state whereStarted holds but Ready does not hold.
◆ AG ❖❜❭ ❲✻❝ ❞AF
❡ ❢❤❣✐❵ : if a Request occurs, then it will beeventually Acknowledged.
◆ AG ❖ AF ❥ ❲✎❦❪❧✛❢❤❲❨♠ ♥♦❙❪♣✠qr❲✻❳s❵ : DeviceEnabled holds infinitely- ften on every computation path.
Restart state.
◆ A ❖ GF ♠ ♥♦❙s♣❤q✖❲✻❳ ❞GF
♠ ✉✈❲✻❢①✇②◗✛❲✻❳s❵ : if a process isinfinitely-often Enabled, then it is infinitely-often Executed. Note that the first four formulas are CTL formulas. The last is an LTL formula, not expressible in CTL.
12
- 2. Model Checking Problem
Let
③be the state–transition graph obtained from the concurrent system. Let
④be the specification expressed in temporal logic. Find all states
⑤ of ③such that
③ ⑥✡⑤ ⑦ ⑧ ④✈⑨Efficient model checking algorithms exist for CTL.
⑩ E. M. Clarke, E. A. Emerson, and A. P. Sistla. Automaticverification of finite-state concurrent systems using temporal logic specifications. ACM Trans. Programming Languages and Systems, 8(2):pages 244–263, 1986.
13
The EMC System
Preprocessor Model Checker (EMC) CTL formulas State Transition Graph 10 to 10 states 4 5 True or Counterexample
14
- H. Hiraishi (Kyoto University)
Vectorized version of EMC algorithm on Fujitsu FACOM VP400E Vector Processor using an explicit representation of the state–transition graph. State Machine size:
❶ 131,072 states ❶ 67,108,864 transitions ❶ 512 transitions from each state on the average.CTL formula:
❶ 113 different subformulas.Time for model checking:
❶ 225 seconds!!15
- 3. Notable Examples
The following examples illustrate the power of model checking to handle industrial size problems. They come from many sources, not just my research group.
❷ Edmund M. Clarke, Jeannette M. Wing, et al. Formalmethods: State of the art and future directions. ACM Computing Surveys, 28(4):626–643, December 1996.
16
Notable Examples–IEEE Futurebus
❸ ❹ In 1992 Clarke and his students at CMU used SMV to verifythe cache coherence protocol in the IEEE Futurebus+ Standard.
❹ They constructed a precise model of the protocol andattempted to show that it satisfied a formal specification of cache coherence.
❹ They found a number of previously undetected errors in thedesign of the protocol.
❹ This was the first time that formal methods have been used tofind errors in an IEEE standard.
❹ Although development started in 1988, all previous attemptsto validate Futurebus+ were based on informal techniques.
17
Notable Examples–IEEE SCI
❺ In 1992 Dill and his students at Stanford used Mur ❻to verify the cache coherence protocol of the IEEE Scalable Coherent Interface.
❺ They modeled a typical configuration using the C code in thedefinition of the SCI standard.
❺ Since the number of states of the model was very large, theyverified only small instances of the system.
❺ Nevertheless, they found several errors, ranging fromuninitialized variables to subtle logical errors.
❺ The errors also existed in the complete protocol, although ithad been extensively discussed, simulated, and even implemented.
18
Notable Examples–HDLC
❼ A High-level Data Link Controller (HDLC) was beingdesigned at AT&T in Madrid.
❼ In 1996 researchers at Bell Labs offered to check someproperties of the design. The design was almost finished, so no errors were expected.
❼ Within five hours, six properties were specified and five wereverified, using the FormalCheck verifier.
❼ The sixth property failed, uncovering a bug that would havereduced throughput or caused lost transmissions.
❼ The error was corrected in a few minutes and formallyverified.
19
Notable Examples–Analog Circuits
❽ In 1994, Bosscher, Polak, and Vaandrager won a best-paperaward for proving manually the correctness of a control protocol used in Philips stereo components.
❽ In 1995, Ho and Wong-Toi verified an abstraction of thisprotocol automatically using HyTech.
❽ Later in 1995, Daws and Yovine used Kronos to checkautomatically all the properties stated and hand proved by Bosscher et al.
❽ In 1996, Bengtsson, et al. model checked the entire protocol.Two years earlier this was considered out of reach for algorithmic methods.
20
Notable Examples–ISDN/ISUP
❾ The NewCoRe Project (89-92) was the first full-scaleapplication of formal verification methods in a software project within AT&T.
❾ Formal modeling and automated verification were applied tothe development of the CCITT ISDN User Part Procotol.
❾ A team of five “verification engineers” formalized andanalyzed 145 requirements using a special-purpose model checker.
❾ A total of 7,500 lines of SDL source code was verified. ❾ 112 errors were found; about 55% of the original designrequirements were logically inconsistent.
21
Notable Examples–Buildings
❿ In 1995 the Concurrency Workbench was used to analyze anactive structural control system to make buildings more resistant to earthquakes.
❿ The control system sampled the forces applied to the structureand used hydraulic actuators to exert countervailing forces.
❿ The first model had more than ➀✿➁❴➂➄➃ states and was not directly- analyzable. By using semantic minimization it was possible to
derive a much smaller model.
❿ A timing error was discovered that could have caused thecontroller to worsen, rather than dampen, the vibration experienced during earthquakes.
22
- 4. Symbolic Model Checking with BDDs
Ken McMillan implemented a version of the CTL model checking algorithm using Binary Decision Diagrams in the fall
- f 1987.
Now able to handle much larger concurrent systems—some with more than
➅✿➆☞➇➉➈➋➊ reachable states!! ➌ J. R. Burch, E. M. Clarke, K. L. McMillan, D. L. Dill, and- J. Hwang. Symbolic model checking:
Information and Computation, 98(2):pages 142–170, 1992.
➌ K. L. McMillan. Symbolic Model Checking. KluwerAcademic Publishers, 1993.
23
Fixpoint Algorithms
EF
➍ ➎ ➍ ➏EX EF
➍p p
24
Fixpoint Algorithms (cont.)
Key properties of EF
➐ :- 1. EF
EX EF
➐2.
➓ ➑ ➐ ➒EX
➓implies EF
➐ ➔ ➓We write EF
➐ ➑Lfp
➓✢→➣➐ ➒EX
➓ .How to compute EF
➐ : ➓↕↔ ➑False
➓➛➙ ➑ ➐ ➒EX
➓↕↔ ➓❘➜ ➑ ➐ ➒EX
➓ ➙ ➓↕➝ ➑ ➐ ➒EX
➓ ➜. . .
25
EF
➤ ?s p
26
EF
➫ ?s p
➭➛➯↕➲ ➳ ➵EX
➭↕➸27
EF
➚ ?s p
➪❘➶➘➹ ➴ ➷EX
➪➛➬28
EF
❮ ?s p
❰↕Ï➛Ð Ñ ÒEX
❰❘Ó29
Ordered Binary Decision Trees and Diagrams
Ordered Binary Decision Tree for the two-bit comparator, given by the formula
Ô❘Õ❜ÖØ× Ù ÖÛÚ Ù✡Ü × Ù✿Ü ÚÞÝ↕ß Õ❜Öà×➛á Ü ×âÝ❉ã Õ❜ÖäÚåá Ü ÚæÝ Ùis shown in the figure below:
b a2 1 b a2 b b a2 1 b a2 b b a2 1 b a2 b b a2 1 b a2 b 2 2 2 2 2 2 2 2 a 2 a 2 a 2 a 2 b 1 b 1 a 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
30
From Binary Decision Trees to Diagrams
An Ordered Binary Decision Diagram (OBDD) is an ordered decision tree where
ç All isomorphic subtrees are combined, and ç All nodes with isomorphic children are eliminated.Given a parameter ordering, OBDD is unique up to isomorphism.
ç R. E. Bryant. Graph-based algorithms for boolean function- manipulation. IEEE Transactions on Computers,
C-35(8):677–691, 1986.
31
OBDD for Comparator Example
If we use the ordering
èêé➛ë ìíé➛ë èÛîåë ì✗î for the comparatorfunction, we obtain the OBDD below:
1 1 1 1 b1 a1 b1 a2 b2 b2 1 1 1
32
Variable Ordering Problem
The size of an OBDD depends critically on the variable ordering. If we use the ordering
ïêð➛ñ ïäòåñ ó✎ð➛ñ ó✗ò for the comparatorfunction, we get the OBDD below:
a1 a2 b b a2 b b 1 1 1 1 b b 2 2 1 1 1 1 1 1 1 1 1 1 1 a 2 a1
33
Variable Ordering Problem (Cont.)
For an
ô -bit comparator: õ if we use the ordering öê÷ùø ú✎÷➛ø ûíû✑û✶ø ö❴ü ø ú①ü , the number ofvertices will be
ý✑ô þ ÿ . õ if we use the ordering öê÷ùø û✑û✑û ø ö❴ü ø ú✎÷ û✎û✏û✐ø ú✿ü , thenumber of vertices is
ý ✁ ÿ ü ✂ ✄ .In general, finding an optimal ordering is known to be NP-complete. Moreover, there are boolean functions that have exponential size OBDDs for any variable ordering. An example is the middle output (
ô✆☎ ✝- utput) of a combinational
circuit to multiply two
ôbit integers.
34
Logical operations on OBDD’s
✞ Logical negation: ✟✡✠☞☛✍✌✏✎✒✑✓✎✒✔✕✎✗✖✙✘Replace each leaf by its negation
✞ Logical conjunction: ✠☞☛✍✌✏✎✚✑✕✎✛✔✓✎✒✖✙✘✢✜ ✣✤☛✍✌✥✎✦✑✓✎✒✔✕✎✒✖✧✘– Use Shannon’s expansion as follows,
✠ ★✩✣ ✪ ✫ ✌ ★✧☛✍✠✭✬✯✮ ✰ ★✩✣✱✬✯✮ ✰ ✘✤✲ ✌ ★✧☛✍✠✭✬ ✰ ★✩✣✱✬ ✰ ✘to break problem into two subproblems. Solve subproblems recursively. – Always combine isomorphic subtrees and eliminate redundant nodes. – Hash table stores previously computed subproblems – Number of subproblems bounded by
✬✳✠✭✬✴★✵✬✶✣✱✬ .35
Logical operations (cont.)
✷ Boolean quantification: ✸✥✹ ✺✼✻☞✽✍✹✏✾✗✿✕✾✒❀✓✾✒❁✙❂– By definition,
✸❃✹ ✺✼✻ ❄ ✻❆❅✯❇ ❈❊❉ ✻❆❅ ❈–
✻❋✽✍✹✥✾✒✿✕✾✗❀✕✾✒❁✧❂✦❅ ❇ ❈ : replace all ✹ nodes by left sub-tree.–
✻❋✽✍✹✥✾✒✿✕✾✗❀✕✾✒❁✧❂✦❅ ❈ : replace all ✹ nodes by right sub-tree.Using the above operations, we can build up OBDD’s for complex boolean functions from simpler ones.
36
Symbolic Model Checking Algorithm
How to represent state-transition graphs with Ordered Binary Decision Diagrams: Assume that system behavior is determined by
- boolean state