SLIDE 27 Carsten Sinz • Bounded Model Checking of Software • VTSA 2018 Summer School, Nancy, France • 29.08.2018
LLVM IR – Instruction Groups
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Instruction Group Members Terminator instructions ret, br, switch, indirectbr, invoke, resume, catchswitch, catchret, cleanupret, unreachable Binary operations add, fadd, sub, fsub, mul, fmul, udiv, sdiv, fdiv, urem, srem, frem Bitwise binary operations shl, lshl, ashr, and, or, xor Vector operations extractelement, insertelement, shufflevector Aggregate operations extractvalue, insertvalue Memory access and addressing operations alloca, load, store, fence, cmpxchg, atomicrmw, getelementptr Conversion operations trunc, zext, sext, fptrunc, fpext, fptoui, fptosi, uitofp, sitofp, ptrtoint, inttoptr, bitcast, addrspacecast Other instructions icmp, fcmp, phi, select, call, va_arg, landingpad, catchpad, cleanuppad