CiS Your Partner from Development to Production of Radiation - - PowerPoint PPT Presentation

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CiS Your Partner from Development to Production of Radiation - - PowerPoint PPT Presentation

CiS Your Partner from Development to Production of Radiation Detectors www.cismst.de R. Rder, Head Department MEMS & Radiation Detectors K. Semmler, Head Business Unit MEMS OUTLINE Orgin/History, Enterprise structure, Staff,


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  • R. Röder, Head Department MEMS & Radiation Detectors
  • K. Semmler, Head Business Unit MEMS

CiS – Your Partner from Development to Production

  • f Radiation Detectors

www.cismst.de

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CiS R. Röder 9 September, 2010

OUTLINE

  • Some facts about CiS

Orgin/History, Enterprise structure, Staff, …

  • CiS products and services
  • CiS experiences in the field of radiation detectors
  • CiS offers

Technology capabilities and capacity, …

  • Actual working packages

Detector development activities, R&D batches

  • Outlook

R&D plans, Road map

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CiS R. Röder 9 September, 2010

X-FAB X-FAB CiS

Location Erfurt Industrial Area southeast

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Some facts about CiS

  • CiS Orgin:

1992 Foundation of unite CiS e.V.

by interested persons and enterprices in the field of microelectronics, MEMS, Optoelectronics and so on

1993 Foundation of CiS GmbH non-profit company, 100% ownerchip CiS e.V.

with laboratories / clean rooms in the Thesys buildings

  • Career:

1996 DIN EN ISO 9001 certification 1997 Start of Prototyping of Silicon Radiation Detectors 1999 CiS Institut for Microsensors gGmbH Start of Prototyping of Silicon Radiation Detectors 2001 New Location in Technology Center AZM 2004 Foundation of CiS Solar Center and Solar Test Lab CiS Resaerch Institut for Microsensors and Photovoltaics GmbH 2008 Best Supplier Award ATLAS PIXEL 2009 CMS Gold Awards

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CiS R. Röder 9 September, 2010

CiS in Numbers

2009 Yearly financial volume 9.4 Mio €, 92 employees (unlimited)

  • Public sector and strategic programmes

51 %

  • Industrial contracts R&D

35 %

  • Industrial contracts (components)

14 %

Microintegration Clean room:

  • 70 m2 acc10 (high temperature processes, resist processing lab, ...)
  • approx. 200 m2 acc100

(test lab, assembly, ...)

  • 200 m2 acc 10,000 (services, assembly, packaging )
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CiS R. Röder 9 September, 2010

CiS Research Institut for Microsensors and Photovoltaics

Enterprise structure

s

  • l

a r R&D testing & analysis wafer processing and Packaging CiS e.V.

CiS Board Scientific Council Supervisory Board

Product groups

MEMS MOEMS Photovoltaik

Services

Design, Simulation, Layout Wafer processing

Assembly+Packaging,

Test+Analysis,

Calibration lab

Services & PV w a f e r p r

  • c

e s s i n g

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CiS Organisation

Technology

Business Units

MEMS MOEMS MOEMS Waferprocessing Assembly / Packaging Test & Analytics Simulation / Design Solar Centre

System

MEMS Photovoltaics

  • Approx. 120 employees (2009)

90 Scientists / engineers 10 apprenticeships Students (Diplom, Masters, PhD)

Departments

Radiation Detectors

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CiS Main Products

Humidity Sensors Emitter-Receiver-Modules PIN-Diode Arrays MEMS Silicon Radiation Detectors

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Business Unit MEMS Department MEMS & Radiation Detectors

Piezoresistive Sensorics

  • High stable pressure

sensors

  • with excellent

long-term stability

  • Small thermal and

pressure hysteresis

3D-MEMS

  • Cantilever
  • Probe tips
  • Force sensors
  • Bi-stable

zero power sensors

Impedimetric Sensorics

  • Micro condensation

sensors

  • Dew point sensors
  • In-line micro fluidic

sensors

MEMS Research and Development Programs

Radiation Detectors

  • single or double sided
  • Micro strip detectors
  • PIXEL detector
  • n-in-n, n-in-p
  • DOFZ, epi-RD
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Development Customer specific sensor solutions

Business Unit MEMS In-house Departements

Research innovative and new sensor concepts and technologies Production high precision sensor chips and systems

  • Small and midsize series production
  • Single and second-source supplier

for leading pressure instrument manufacturers

  • Unit process / process sequence or

complete processing (foundry)

  • Continuous yield improvement and

quality management system

  • Modelling, Simulation, Design
  • Manufacturing departements
  • wafer processing
  • dicing
  • assembly &

packaging

  • test& calibration
  • Experienced project leader

in industrial, automotive and medical engineering

  • more than 20 funded

research projects

  • Long-term and close relations

to MEMS / Sensor research and university institutes

  • Long-term and close relations

to University of Hamburg, TU Dortmund, MPI HLL Munich

MEMS Services for Industry Partners

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Equipment

Simulation & Design

  • Layout – CAD-Software
  • FEM-Simulation tools for

electrical, optical, mechanical & thermal calculations e.g. ANSYS, COMSOL, ATLAS, ATHENA, TESCA

  • SPICE-Simulations (HSPICE, CADENCE pSPICE)

Assembly and packaging

  • Automatic die bonder,

manual fine placer for flip-chip assembly

  • Automatic ultra-sonic and thermosonic wire bonder
  • Semiautomatic wire bonder
  • Screenprinter and SMD-mounter, Automatic

dispenser

  • Wafer dicing (e.g. Si, glass), precision dicing

process

  • Vapor-phase, hot bar,

vacuum and laser soldering equipment

  • Electroless Nickel Bumping like IZM standard

process

Test & Analytics

  • 8inch wafer prober

+ 4inch and 6inch front and backside wafer prober

  • Opto-wafer-prober (e.g. OBIC)
  • SIMS-analysis, SEM including EDX, AFM
  • Optical and mechanical profilometer
  • Climate and temperature shock test chambers,

Pressure cooker

  • Measurement techniques

e.g. CV, TVS, UBR, pin-hole, lifetime

Wafer

  • 4inch wafer line, front and backside processing
  • Lithography < 1μm
  • Lift-off resist system (single and double layer

solution)

  • Under bump metalization
  • Spray-Coating for 3D-MEMS/MOEMS
  • Si-direct bonding, anodic bonding
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Wafer Processing Equipment

  • 4 inch

some process steps already in 6 inch (capable), equipment partly 6 inch compatible

  • Silicon (FZ, CZ, n-typ, p-typ, epi, SOI, SF bonded wafer)
  • High temperature facility
  • 6 inch capable, investment in quartz ware is necessary
  • dry and wet oxydation (O2,HCl, H2O, /O2) without organics !
  • oxygen enrichment (DO, e.g. DOFZ)
  • diffusion and anneling steps (N2 800…1200°C, H2 …420°C)
  • diffusion by target gas
  • LP-CVD (only 4 inch capable)
  • silicon nitrid
  • high temperature oxid HTO
  • Poly-Silicon
  • low temperature oxid LTO (doped or undoped)
  • PE-CVD (only 4 inch capable)
  • silicon nitrid
  • silicon oxynitride
  • phosphorus silicate glass PSG – POCl3
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Wafer Processing Equipment

  • Magnetron sputter facility (2x)
  • Al, AlSi, AlSiTi, TiN, MoSi, other targets available (W,…)
  • 4 inch → 6 inch capability require re-equip of wafer chuck etc.
  • RIE- and plasma etching equipment (only 4 inch capable)
  • Wet benches: isotrop, anisotrop and electro-chemical etching
  • porousizing
  • Megasonic fine cleaning (only 4 inch capable)
  • Automatic coating & developing cluster for double-sided processing
  • alignment precision rear to front side better than 5 µm

for double side detector processing ~ 2 µm

  • 6 inch capable
  • Double-sided alignment and exposure facility BA/MA6
  • alignment precision rear to front side approx. 1 µm
  • Silicon Fusion facilities
  • BA/MA6 + SB6L
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Wafer Processing Equipment

  • Spray coating equipment for 3D-structuring
  • new own equipment developed → 6 inch capable
  • Goal: 3D pattering process

with an optimized and highly conform spray-coating photoresist deposition which provides an improved pattern resolution and process stability.

Commercial spra ray coater CiS spray coater CiS spray coater

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Wafer Processing Post-Processing Technology Modules

Lift-off masks for UBM

▪ single-layer lift-off resist

▪ double-layer lift-off resist

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Wafer Processing Post-Processing Technology Modules

  • Electroless Nickel UBM Process
  • like IZM-process, licenced by IZM
  • optimized for regular array structures e.g. ATLAS PIXEL
  • 5 µm Ni und 60-80 nm Au
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NETWORK external services

  • FZ Wafers ▪ Topsil (ingot, wafers as cut, dsp)

▪ additional qualified supplier ???

  • Cz, MCz

▪ Okmetic (certificated supplier)

  • Epi layer
  • Okmetic (certificated supplier)

+ ITME (R&D)

  • Wafer Polishing

▪ Okmetic (certificated supplier)

▪ additional qualified supplier ???

  • Wafer Thinning + Polishing
  • Okmetic (certificated supplier)

+ WaferWorld (first experience) ▪ additional qualified supplier ??? + Disco (first experience)

  • CMP
  • ZMN Ilmenau
  • Fraunhofer Institute ENAS
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NETWORK external services

  • Implantation
  • Ion Beam Services (F + GB high dosis fascilities)

→ Boron, Phosphorus, Arsenic, …

  • FZ Dresden-Rossendorf

→ high energy implantation → unusual dopands

  • Au Metalization
  • ifw Jena

(very good experience in combination with lift-off Ti-Ni-Au UBM)

  • DRIE/ICP
  • ZMN Ilmenau
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Wafer Testing and Analysis

  • Monitoring of Wafer processing
  • Control and release of process equipment
  • Release of targets and process ware (HT tubes, LP – CVD)
  • Release of chemicals (especially new resists)
  • TVS – concentration of mobile sodium and potassium ions

by application of triangular voltage sweep on MOS structures

  • control of process steps (HT, CVD, …)
  • CV, UBR, pinhole
  • Control of wafer processing
  • Cleaning steps
  • TVS, CV, UBR, pinhole
  • processed struktures and monitoring wafers
  • SIMS, REM / ESMA, cross section Schliff, lifetime, …..
  • resist structure – lateral parameters, layer thickness,
  • refraction index, grain sizes
  • (wafer) bow
  • Life time control
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Testing and Analysis

  • Functional test
  • on wafer / chip
  • boards, module or devices
  • Development and Application of Measurement and Test Technology
  • electrical, optical and geometrical / mechanical measurements
  • Development and characterization of technology test

structures

  • test chips on wafer
  • Quality and Reliability tests
  • Process Control and Monitoring
  • Sensor Calibration
  • Solid State Analysis and Particle Measurement
  • REM structural inspections
  • SIMS analyses and studies
  • Environmental analysis (Accredited measurement Bureau)
  • Characterization of technological partial stages
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Wafer Testing and Analysis Row material testing

  • Control of bought wafers
  • Life time

← WT2000

  • Bow and TTV

← µscan

  • particles

← optical surface inspection

  • crystal defects

← optical surface inspection ← life time measurment

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Wafer testing

Teflon chuck for measurement of double-sided detectors Teflon chuck for measurement of double-sided detectors

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Life Time Wafer Screening

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Assembly and housing

Dicing

  • glass, ceramic, silicon
  • special precise dicing for

double-sided detectors

  • up to 6 inch substrates

Chip & Wire

  • Ultrasonic and

thermosonic bonding

  • Eutektic bonding
  • Bonding by thick wire
  • Stud bumping
  • Microbumping

Carrier

  • Silicon, PCB, glass and ceramic

Housing

  • Underfilling and glob topping
  • Adhesive caps

Ralf Röder

Micro Modules

  • SMD
  • COB / Flip-Chip-Packaging
  • Chip-size-Packaging:

Chip-in-Chip and Chip-on-Chip

  • Low-cost Au-ball-bumping
  • Flux-free Flip-Chip-Reflow-Soldering
  • Multi-Chip-Modules
  • Frame soldering of PI-Flex tapes
  • n to sensitive glass substrats
  • Micro-Hybride-Modules
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Road Map – CiS plans

  • 4 inch thin dsp wafer project 2010…2011
  • finishing of actual R&D batches up to December 2010
  • improve double-side technology for processing and handling
  • f thinner wafers (especially for 150 µm thick wafer processing)
  • 4 inch double side wafer projects for GSi/FAIR
  • finishing of actual R&D batches 2010
  • Prototyping 2011
  • 4 inch APD wafer projects 2010…2011
  • APD arrays for medical applications
  • 6 inch mixed foundry project 2011…2012
  • key process steps in CiS + XFAB including implantation
  • start with single-side micro strip detectors in 2011
  • using CMOS capabilities for single side detectors starting in 2012
  • 6 inch foundry project
  • 6 inch line concept

2011/2012

  • new clean room is necessary + 6 inch equipment start may be in 2013
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NETWORK R&D partners

  • TU Ilmenau (less than 50 km from Erfurt, CiS became An-Institute of TU Ilmenau)
  • Centrum Micro-Nano (ZMN)
  • MPI HLL Munich
  • Design und Technology
  • Prototyping
  • Volume production of ATLAS WEDGE Detectors
  • University Hamburg
  • Raditation hard detectors => pad detectors for RD50
  • first epi-detectors
  • R&D DOFZ 12 … 72 h
  • University / TU Dortmund
  • Raditation hard PIXEL detectors
  • University Freiburg
  • Micro strip detectors
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Radiation Detectors from CiS

Basic Sensitive Elements

  • pad detectors
  • micro strip detectors

pitch ≥ 50 microns

  • pixel detectors

Basic Wafer Process Features

  • double side processing

double sided alignment ≤ ± 2 micron

  • radiation hardening by defect engineering
  • xygen enriched wafers
  • implanted pn junctions
  • ne or two metalization layers
  • special dicing capabilities for large
  • r non-orthogonal chips
  • thinned detector chips 50 ... 200

microns

  • avalanche diode arrays
  • under development –

minimum size ≥ 10 microns × 10 microns pitch ≥ 20 microns

  • ac coupled detector structures
  • dc coupled detector structures
  • different passivation options
  • oxid, nitride
  • parylene or other organic

hermetization

  • under development-
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Radiation Detectors from CiS

Substrates 4 inch

  • p-typ and n-typ FZ wafers

resistivity 1,000 ... 30,000 Ohmcm

  • p-typ and n-typ CZ resp MCZ wafers

resistivity ≥ 500 Ohmcm

  • epitaxial layers

resistivity 50 ... 500 Ohmcm

Biasing

  • punch-through
  • FOXFET
  • implanted resistors
  • poly-silicon resistors
  • thickness 20 ... 150 microns
  • silicon wafer thickness

series production ≥ 200 microns R&D ≥ 150 microns

Isolating Features

  • p-spray
  • moderated p-spray
  • p-stopp
  • etched trenches
  • multi-guard ring
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Available Process Flows

Many different Process Flows available:

especially:

  • n-in-n ds Pixel

DSPIX01, DSPIX02, DSPIXT1 DSPIX03 (Poly-Si-R option)

  • n-in-n ss Micro-strip

SSD01, SSD02 (epi, thinned), SSD03

  • n-in-n ds Micro-strip

DSD01, DSD02 (dc) DSD03 (Poly-Si-R option)

  • n-in-n ds dm Micro-strip

DSDM01, DSDM02 (Poly-Si-R option)

  • n-in-p ss Micro-strip / Pixel

SSD11, SSD12

  • n-in-p ds Micro-strip

DSD13 (Poly-Si-R option)

  • Silicon Photomultiplier Pixel

SPID01, SPID02

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CiS capability

  • Clean Room Operating: three-shift working regime
  • Capabilities: about 4,000 Lithographies per month

⇒ 50,000 technological layers p.a. that means for instance up to 3,000 pcs double-sided PIXEL wafers 2009 additional equipment + additional capability more than 6,000 Lithographies per month

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References Overview CiS-production of radiation detectors

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PIXEL Detector References

Tile 1 Tile 2 Tile 3 Wafer Wafer Wafer Wafer Wafer Wafer Summe Udep PIXEL % % % 0 Tile 1 Tile 2 Tiles % 3 Tiles % i.O. i.O. ATLAS Pre 42,4% 49,4% 62,4% 15% 32% 29 34% 16 19% 45 44 ATLAS 63,7% 61,6% 60,0% 13% 21% 452 32% 497 34% 949 870 CMS Pre (2 tiles p.w.) 75,4% 52,6%

÷

15% 40% 25 45%

÷ ÷

25 25 CMS 79,9% 82,8% 82,1% 6% 3% 147 33% 263 59% 410 410 XPAD3_01 88,0% 88,0% 85,7% 4% 0% 9 19% 28 58% 37 37

yield of good tiles

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Detector References

PIXEL detectors

  • double-sided production
  • ATLAS PIXEL
  • DOFZ (unpolished wafer form Wacker,

polishing by SICO, DO by CiS [O2 1150°C 24h] )

  • 250 µm thick wafers ! (prototyping also 200 µm)
  • CMS PIXEL

delivered to PSI

  • DOFZ (unpolished wafer form Wacker / Siltronic one ingot !,

polishing by Okmetic, DO by CiS [O2 1150°C 24h] )

  • double-sided R&D
  • SDTW10
  • SDTW11
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Detector References

PIXEL detectors

  • single-sided R&D
  • XPAD3

prototyping delivered to cppm / F

  • SDTW07

R&D CiS R&D test chips for other institutes

  • p-typ-bulk
  • poly-silicon-resistor biasing
  • poly-silicon filed plates
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Detector References

Micro-strip detectors

  • R&D single-sided
  • SDTWnn prototyping

R&D CiS → Uni Hamburg → RD50

  • DOFZ, FZ, epi (high ohmic, up to 150 µm thick), CZ, MCZ
  • Production single-sided
  • ATLAS WEDGE W12
  • DOFZ, implanted bias resistors, ac, moderated p-spray
  • ATLAS WEDGE W21, 22, 31, 32
  • implanted bias resistors, ac, moderated p-spray
  • H1-PHI
  • punch-through biasing, ac, field plate
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Detector References

Micro-strip detectors

  • Production double-sided
  • STAR

delivered to Eurisys / F

  • punch-through biasing, ac, field plate
  • N768

delivered to Eurisys / F

  • punch-through biasing, ac, field plate
  • ALICE S2

delivered to Canberra / B

  • punch-through biasing, ac,

front side p-strips, back-side n-strips isolated by p-spray

  • AMS-2C (150 pcs)

delivered to MSU / RF

  • thick HT-oxid (650nm), FOX-FET biasing, dc,

front side p-strips, back-side n-strips isolated by p-stop

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Detector References

Micro-strip detectors

  • R&D double-sided
  • D0

prototyping delivered to Eurisys / F

  • poly-silicon-resistor biasing
  • CBM01 + SPID

GSi / FAIR

  • punch-through biasing, ac,

double metalization layer (front side)

  • poly-silicon-resistor biasing
  • SDTW07

R&D CiS

  • p-typ-bulk, p-typ-epi
  • punch-through biasing, ac,
  • poly-silicon-resistor biasing
  • poly-silicon filed plates
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R&D Defect Engineering of Radiation Detectors

  • oxygenation, denuded zone (founded R&D SRD , MUZ, SSD)
  • DO + epi (founded R&D MUZ)
  • defect optimized wafer zones (founded R&D MUZ)
  • oxygen, carbon, hydrogen, ...
  • zone engineering (denuded zone engineering,

bulk layers with various defect concentration [especially oxygen])

  • studies of precipitations:

perhaps making of free zone of [O]-precipitations

  • TD engineering
  • optimalization of process parameters

+ processing steps vs. behavior

  • problem: epi-layer double-side devices
  • Monitoring wafer: various test resp monitoring structures:

– radial distribution of the behavior of some electrical parameters

  • before processing → after wafer processing
  • before radiation → after radiation
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Activities to improve Radiation Hardness

  • DOFZ

increase of oxygen content of the bulk material (1999)

  • already used

for processing detectors

  • ATLAS WEDGE W12
  • ATLAS PIXEL
  • CMS PIXEL
  • CiS R&D program „Defect engineering“

(founded R&D SRD)

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Actual working packages Detector development activities, R&D batches

  • 2009…2010:
  • R&D NEW ATLAS PIXEL DESIGN

SDTW10 SDTW11

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Actual working packages Detector development activities, R&D batches

  • in progress:
  • R&D NEW ATLAS PIXEL DESIGN by TU Dortmund (CiS name SDTW11)

all external processes (implantation loops) finished

  • batch 301061 with standard thickness 250 µm + DOFZ 12h

Σ remainig wafers 10 (20) (9 + 1 error by implatation resp. transport)

  • wafer process completion date 18.09.2010
  • 1 repetition batch : wafer process completion date 02.12.2010
  • batch 301066 with wafer thickness 225 µm

+ DOFZ 12h + Poly-Si-R

Σ remainig wafers 12 (12)

  • wafer process completion date: begin of October 2010
  • batch 301065 with wafer thickness 200 µm

+ DOFZ 12h + Poly-Si-R Σ remainig wafers 10 (12) (2 wafers error by transportation)

  • wafer process completion date: begin of October 2010
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Actual working packages Detector development activities, R&D batches

  • in progress:
  • R&D NEW ATLAS PIXEL DESIGN
  • batch 301067 with wafer thickness 175 µm

(no DOFZ 12h)

Σ remainig wafers 12 (12)

  • wafer process completion date 25.09.2010
  • batch 301068 with wafer thickness 150 µm

(no DOFZ 12h) Σ remainig wafers 9 (18) (4 wafer crashes in transport trays and 5 wafers became crashes by automatic handling)

! untypical wafer crashes (wafers are „crumbly“; not typical breaks)

  • wafer process completion date 25.09.2010
  • next steps: arrange wafer test before UBM
  • CiS-internal R&D
  • APDs for medical applications (Silicon Photomultiplier, pixel arrays)
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Thin PIXEL Detectors Improving of thin detector processing

  • better quality of thin dsp wafers
  • better transportation trays
  • qualification of automatical handling equipment, especially

Automatic coating & developing cluster

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Conclutions

One of our most essential points:

How to safe good processing yield What starting material will bring good results What technology will guarantee best results

Three points of interest:

  • higher radiation hardness
  • radiation harder silicon

DOFZ, epi, bonded wafer, ...

  • by special defect engineering

denuded zones, multiple zone engineering, ...

  • smaller strip and pixel sizes + active structures
  • lower costs + better features
  • higher production yield
  • lower leakage current
  • higher S/N, higher charge collection efficiency, ...

Development of new Silicon Detectors for HEP and CR

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PIXEL2010

CiS R. Röder 9 September, 2010 CiS Forschungsinstitut für Mikrosensorik und Photovoltaik GmbH Konrad-Zuse-Straße 14 Ralf Röder Department MEMS + Radiation detectors D-99099 Erfurt phone: +49 361 663-1473 info@cismst.de mobile: +49 172 342 4311 www.cismst.de rroeder@cismst.de President:

  • Dr. HJ. Freitag

hjfreitag@cismst.de

Many Thanks for Attention