[PPT] - Cl Clocks, s, Co Counters, s, and Ti Timers 01204322 Embedded PowerPoint Presentation

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Cl Clocks, s, Co Counters, s, and Ti Timers

Chaipo Chaiporn J n Jaik aikae aeo De Department of f Computer Engineering Kasetsart Unive versity

01204322 Embedded System

Revised 2020-01-07

Materials from RM0394: Reference Manual for STM32L41xx/2xx/3xx/4xx/5xx/6xx

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Ou Outline

Clock sources
Basics of counters and timers
Clocks, counters, and timers in ARM Cortex-M chips
Hands-on activity with NUCLEO-L432KC board

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Cl Clock k Signals

Clock signals are required for a lot of stuff
CPU execution
Internal communications, e.g., peripheral bus
External communications, e.g., USB, USART
Analog-to-digital conversion
Tick generation for timers

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Co Counters s and Ti Timers

Counters and timers are ones of the

most important components of MCUs

A counter keeps track of how many

event ticks have occurred

A timer is a counter that counts

deterministic clock cycles

Two terms are often used

interchangeably

http://clipart-library.com/image_gallery/92121.png http://clipart-library.com/images/rcnRnRocR.png

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Ty Typical Uses of Counters/Timers

Scheduling future events
One-shot events
Periodic events
Input capture
Measuring input pulse length
Output waveform generation
Output compare – flags or toggles output pin

when the counter reaches a certain value

Pulse-width modulation (PWM) – generates

analog output encoded as pulse length

Image by Hebi B. from Pixabay

https://www.makerlab-electronics.com

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Ba Basi sic Co Counter/ r/Ti Timer r Operations

counter

ticks

Counter reset when overflows or reaches auto-reload value
A flag is raised; interrupt is triggered

clock

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Co Counter r Mo Modes

Up-counting
Down-counting
Center aligned (up/down)

counter

ticks

counter

ticks

counter

ticks

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Pr Prescaler

Divides clock frequency; increases timer period

clock (prescaler = 1) prescaler = 2 prescaler = 4 counter counter counter

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Input Input C Captur ure

Measures input pulse lengths
Applications: decoding remote control signals,

distance measurement

counter

ticks clock input pulses current counter’s values recorded as captured input

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Ou Output Com

mpare
Generates an event when counter matches a certain value
Possible MCU’s behavior when receiving a compare event:
Sets a flag
Generates an interrupt
Sets, resets, or toggles output pin

counter

ticks clock compare value event event event

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Pu Pulse-Wi Width th Modulati tion (PWM WM)

PWM utilizes duty cycle control to simulate analog output
Applications: motor speed control, servo position control,

LED brightness control

Analog data PWM output 25% duty cycle 50% duty cycle 75% duty cycle

https://en.wikipedia.org/wiki/Pulse-width_modulation

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PW PWM Wavefor

rm Generation
n
Typical MCU behavior
Auto-reload event sets output pin high
Output-compare event sets output pin low
Output compare value determines PWM duty

counter

ticks clock compare value

PWM Output

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NU NUCLEO-L4 L432KC C Develo lopme ment t Bo Boar ard

STM32L432KC target chip
ARM 32-bit Cortex-M4 up to 80MHz

with single-precision FPU

256KB Flash, 64KB SRAM
1x 12-bit ADC (10 channels), 2x 12-bit DAC
32.768 kHz external crystal oscillator
On-board user LED and reset button
On-board ST-LINK/V2-1 debugger
Serial Wire Debug (SWD)
Virtual COM port (VCP)
Mass storage interface
Pin-compatible with Arduino Nano

Source: ST’s UM1956: STM32 Nucleo-32 Boards

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Cl Clock k Options s for r STM3 TM32L4xx xx

Clock sources for the system clock (SYSCLK)
High-speed internal (HSI 16): 16 MHz RC oscillator
Multispeed internal (MSI): 100 kHz to 48 MHz RC oscillator
High-speed external (HSE): from 4 to 48 MHz crystal oscillator
Phase-locked loop (PLL)
Additional clock sources (for USB, real-time clock, etc.)
Low-speed internal (LSI) 32 kHz RC oscillator
Low-speed external (LSE): 32.768 kHz crystal oscillator
High-speed internal (HSI 48): 48 MHz RC oscillator
MSI can be automatically trimmed by LSE using PLL
Achieves accuracy better than +/- 0.25%

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Cl Clock k Settings s for r NUCL CLEO-L4 L432KC

External 32.768 kHz crystal oscillator
Used for real-time clock (RTC) and low-power operations
Also used for trimming MSI clock
System clock: 80 MHz
MSI at 4 MHz,

multiplied by PLL

Auto-trimmed by LSE

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ST STM32L4xx’s Timers

Basic timers: TIM6/TIM7
General-purpose timers: TIM2/TIM3 and TIM15/TIM16
Advanced timers: TIM1
Low-power timers: LPTIM

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ST STM32L4xx’s General-Pu Purpose Timers

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Impo Important T Timer mer-Re Related Re Registers

TIMx->PSC (16 bits)
Prescaler for TIMx
PSC = 0 à no prescaler (prescaler = 1)
PSC = n à prescaler = n+1
TIMx->ARR (32 bits)
Auto-reload register for TIMx
Counter counts up to and including ARR
Therefore, reload occurs every ARR+1 clock ticks
TIMx->CCRy (32 bits)
Capture/compare register for TIMx, channel y

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Ca Calculating Ti Timer r Peri riod/Frequency

Let
PSC = Prescaler (TIMx->PSC)
ARR = Auto-Reload Register (TIMx->ARR)
Then
r

𝑔𝑠𝑓𝑟%&'() = 𝑔𝑠𝑓𝑟+,-+. 𝑄𝑇𝐷 + 1 ×(𝐵𝑆𝑆 + 1) 𝑞𝑓𝑠𝑗𝑝𝑒%&'() = 𝑞𝑓𝑠𝑗𝑝𝑒+,-+.× 𝑄𝑇𝐷 + 1 ×(𝐵𝑆𝑆 + 1)

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Ex Example: ample: Ti Timer er Per eriod

What is the timer’s period in milliseconds with the

following configuration?

Up-counting configuration
Input clock: 80 MHz
Prescaler (PSC): 999
Auto-reload register (ARR): 4999

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PW PWM Mod

des 1 vs 2

counter

ticks clock CCR

PWM mode 1 (output cleared after match) PWM mode 2 (output set after match)

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Ca Calculating PWM M Duty y Cy Cycle

Assume up-counting configuration and PWM mode 1

(output is clear when compare match)

Let
ARR = Auto-Reload Register (TIMx->ARR)
CCR = Capture/Compare Register (TIMx->CCRy)

𝑒𝑣𝑢𝑧@A' = B 𝐷𝐷𝑆 (𝐵𝑆𝑆 + 1) ×100% , 𝐷𝐷𝑆 ≤ 𝐵𝑆𝑆 100% , 𝐷𝐷𝑆 > 𝐵𝑆𝑆

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Ex Example: ample: PW PWM Duty Cycle

What is the PWM’s frequency and duty cycle with

the following configuration?

Up-counting configuration
Input clock: 80 MHz
Prescaler (PSC): 79
Auto-reload register (ARR): 4999
Capture/compare register (CRR): 2000
PWM mode 1

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Ha Hands nds-on

n:

: LD LD3 B Brig rightness C Contro rol

Control brightness of on-board LED (LD3) using PWM
LD3 is attached to PB3, which is also output of TIM2,

channel 2

PWM frequency: 5 kHz
Initial brightness: 10%

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Co Configuri ring PB3 B3

Attach PB3 to TIM2_CH2

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Co Configuri ring TI TIM2 M2, Ch Channel 2

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Co Configuri ring PWM

Input clock freq = 80 MHz
Required PWM frequency: 5 kHz
Possible PSC/ARR configurations
PSC = 7999, ARR = 1
PSC = 799, ARR = 19
PSC = 79, ARR = 199
:
Initial duty cycle: 10%
CCR = 20

𝑔𝑠𝑓𝑟%&'() = 𝑔𝑠𝑓𝑟+,-+. 𝑄𝑇𝐷 + 1 ×(𝐵𝑆𝑆 + 1)

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St Star art PW PWM

Start PWM before entering the infinite loop
Leave the infinite loop empty for now

/* Initialize all configured peripherals */ MX_GPIO_Init(); MX_TIM2_Init(); /* USER CODE BEGIN 2 */ HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_2); /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ } /* USER CODE END 3 */

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Ad Adju justing Brightness with Debugger

Try adjusting the value of CCR2 register in the debugger

(SFRs tab)

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Co Conclusi sion

MCUs require clock signals for CPU execution and
perations of many components
Counters/timers are crucial MCU components for time-

related tasks, such as

Scheduling one-shot or periodic events
Measuring input pulse lengths (input capture)
Generating output PWM waveform for specific frequency and duty