Computer Organization von Neumann Computer Arithmetic-Logical Unit - - PowerPoint PPT Presentation

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Computer Organization von Neumann Computer Arithmetic-Logical Unit - - PowerPoint PPT Presentation

Computer Organization von Neumann Computer Arithmetic-Logical Unit Control Unit (ALU) Data Address Primary Memory Device (Executable Memory) Device Device The ALU Right Operand Left Operand R1 R2 . . . Rn Functional Unit Status


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SLIDE 1

Computer Organization

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SLIDE 2

Device Device

von Neumann Computer

Arithmetic-Logical Unit (ALU) Control Unit Primary Memory (Executable Memory) Device Address Data

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SLIDE 3

The ALU

R1 R2 Rn . . .

Status Registers Functional Unit

Left Operand Right Operand Result

To/from Primary Memory

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SLIDE 4

Memory Unit

MAR MDR Command

1234 98765 write 1 2 n-1 1234 98765

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SLIDE 5

Program Specification

int a, b, c, d; . . . a = b + c; d = a - 100; ; Code for a = b + c load R3,b load R4,c add R3,R4 store R3,a ; Code for d = a - 100 load R4,=100 subtract R3,R4 store R3,d

Source Assembly Language

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SLIDE 6

Machine Language

; Code for a = b + c load R3,b load R4,c add R3,R4 store R3,a ; Code for d = a - 100 load R4,=100 subtract R3,R4 store R3,d

Assembly Language

10111001001100É1 10111001010000É0 10100111001100É0 10111010001100É1 10111001010000É0 10100110001100É0 10111001101100É1

Machine Language

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SLIDE 7

Control Unit

Fetch Unit Decode Unit Execute Unit 3050 load R4,c

PC IR

load R3,b load R4,c add R3,R4 store R3,a 3046 3050 3054 3058

Control Unit Primary Memory

10111001001100É1 10111001010000É0 10100111001100É0 10111010001100É1

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SLIDE 8

Control Unit Operation

PC = <machine start address>; IR = memory[PC]; haltFlag = CLEAR; while(haltFlag not SET) { execute(IR); PC = PC + sizeof(INSTRUCT); IR = memory[PC]; };

¥ Fetch phase: Instruction retrieved from memory ¥ Execute phase: ALU op, memory data reference, I/O, etc.

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SLIDE 9

Bootstrapping

Bootstrap loader (Òboot sectorÓ) Primary Memory

1

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SLIDE 10

Bootstrapping

Bootstrap loader (Òboot sectorÓ) Primary Memory Loader

1 2

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SLIDE 11

Bootstrapping

Bootstrap loader (Òboot sectorÓ) Primary Memory Loader OS

1 2 3

  • 4. Initialize hardware
  • 5. Create user environment
  • 6. É
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SLIDE 12

Bootstrapping

Bootstrap loader (Òboot sectorÓ) Primary Memory Loader OS

1 2 3

  • 4. Initialize hardware
  • 5. Create user environment
  • 6. É
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SLIDE 13

Device Organization

Abstract I/O Machine Application Program Device Controller Device

¥Device manager ¥Program to manage device controller ¥Supervisor mode software

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SLIDE 14

Device Controller Interface

Command Status Data 0 Data 1 Data n-1

Logic

busy done Error code . . . . . .

busy done 0 0 idle 0 1 finished 1 0 working 1 1 (undefined)

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SLIDE 15

Performing a Write Operation

while(deviceNo.busy || deviceNo.done) <waiting>; deviceNo.data[0] = <value to write> deviceNo.command = WRITE; while(deviceNo.busy) <waiting>; deviceNo.done = TRUE;

¥ CPU waits while device operates ¥ Devices much slower than CPU ¥ Would like to multiplex CPU to a different process while I/O is taking place

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SLIDE 16

Control Unit with Interrupt

PC = <machine start address>; IR = memory[PC]; haltFlag = CLEAR; while(haltFlag not SET) { execute(IR); PC = PC + sizeof(INSTRUCT); IR = memory[PC]; if(InterruptRequest) { memory[0] = PC; PC = memory[1] };

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SLIDE 17

Interrupt Handler

interruptHandler() { saveProcessorState(); for(i=0; i<NumberOfDevices; i++) if(device[i].done) goto deviceHandler(i); /* something wrong if we get to here É */ deviceHandler(int i) { finishOperation(); returnToProcess(); }

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SLIDE 18

A Race Condition

saveProcessorState() { for(i=0; i<NumberOfRegisters; i++) memory[K+i] = R[i]; for(i=0; i<NumberOfStatusRegisters; i++) memory[K+ NumberOfRegisters+i] = StatusRegister[i]; } PC = <machine start address>; IR = memory[PC]; haltFlag = CLEAR; while(haltFlag not SET) { execute(IR); PC = PC + sizeof(INSTRUCT); IR = memory[PC]; if(InterruptRequest && InterruptEnabled) { disableInterupts(); memory[0] = PC; PC = memory[1] };

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SLIDE 19

Ensuring that trap is Safe

executeTrap(argument) { setMode(supervisor); switch(argument) { case 1: PC = memory[1001]; // Trap handler 1 case 2: PC = memory[1002]; // Trap handler 2 . . . case n: PC = memory[1000+n];// Trap handler n };

¥ The trap instruction dispatches routine atomically ¥ A trap handler performs desired processing ¥ ÒA trap is a software interruptÓ