Digital Circuits and Systems Logic Minimization URL of NPTEL - - PowerPoint PPT Presentation

digital circuits and systems
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Digital Circuits and Systems Logic Minimization URL of NPTEL - - PowerPoint PPT Presentation

Digital Circuits and Systems Logic Minimization URL of NPTEL lecture hyper link: Reflection Spot Question: Why do we need to consider using less number of gates to design the same circuit? Reflection Spot Answer: Using less number of gates


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Digital Circuits and Systems Logic Minimization

Reflection Spot Question: Why do we need to consider using less number of gates to design the same circuit? Reflection Spot Answer: Using less number of gates

  • Increases the speed of operation of the circuit
  • Decreases the cost
  • Less consumption of power
  • Saving in hardware

URL of NPTEL lecture hyper link:

Souce: WikipediaCircuit-minimization.svg

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LbD:1 At 26.46 Can you compare the two methods to simplify the Logic expression discussing the advantages and disadvantages. Answer: The non confirmation of the minimized expression by Boolean algebra is not much advantageous than a systematic method(K-Maps) which gives the final minimized expression. minimization and comparing the expression obtained from the two methods will reveal that K-map method is most systematic method.

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LbD At 12:32 For what we use minimization of logic expression is used?

  • a. Design of Sequential Circuits
  • b. Design of Combinational circuits
  • c. Both
  • d. None.

Answer: All the combinational and sequential circuits are designed based on the simplified expression what was obtained after using any of the two methods(Boolean Algebra and K-Maps).