Mixed-Criticality Scheduling with I/O Eric Missimer, Katherine - - PowerPoint PPT Presentation

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Mixed-Criticality Scheduling with I/O Eric Missimer, Katherine - - PowerPoint PPT Presentation

Introduction Scheduling Example Utilization AMC Results Conclusions Extra Mixed-Criticality Scheduling with I/O Eric Missimer, Katherine Missimer, Richard West Boston University Computer Science 1 / 25 Introduction Scheduling Example


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Mixed-Criticality Scheduling with I/O

Eric Missimer, Katherine Missimer, Richard West Boston University Computer Science

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Introduction

◮ Previously developed Quest-V separation kernel for

mixed-criticality systems

◮ Mixed-criticality now applied to single Quest kernel ◮ Mixed-criticality scheduling in presence of I/O ◮ Work builds on Quest’s hierarchical VCPU scheduling

framework

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Quest-V Mixed-Criticality Support

Quest-V – each sandbox has a single criticality level

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New Contribution: Quest Mixed-Criticality Support

Quest or a single Quest-V sandbox – multiple criticality levels

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Quest Virtual CPUs (VCPUs)

Scheduling hierarchy: threads→VCPUs→PCPUs

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Quest VCPUs

◮ Two classes

◮ Main → for conventional tasks ◮ I/O → for I/O event threads (e.g., ISRs)

◮ Scheduling policies

◮ Main → Sporadic Server (SS) ◮ I/O → Priority Inheritance Bandwidth-preserving Server

(PIBS)

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SS Scheduling

◮ Each SS VCPU has pair (C,T) ◮ Guarantee budget (C) every period (T) when runnable ◮ Rate-monotonic scheduling theory applies

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PIBS Scheduling

◮ Each I/O VCPU has utilization factor UIO ◮ I/O VCPU inherits period & priority from Main VCPU

that caused I/O request

◮ TIO = TMain ◮ CIO = UIO×TMain ◮ I/O VCPU eligible to execute at te = t + Cactual/UIO ◮ t =start of latest execution (>= previous eligibility time)

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Scheduling Framework

Task & interrupt (CPU & I/O) scheduling in Quest

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Sporadic Server Only

Sporadic Server only example – replenishment list fills up, more scheduling events

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Sporadic Server + PIBS

Sporadic Server + PIBS – no delayed replenishment due to fragmentation, less scheduling events

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SS+PIBS Utilization Bound

◮ System of n Main and m I/O VPUs, and one PCPU ◮ n−1 i=0 Ci Ti + m−1 j=0 (2 − Uj)·Uj ≤ n·(

n

√ 2 − 1)

◮ Ci & Ti are the budget capacity and period of Main

VCPU Vi

◮ Uj is the utilization factor of I/O VCPU Vj

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PIBS Max Utilization in Main VCPU Period, T

C1 + C2 T = (T ′×U) + C2 T = (T − C2) ×U + C2 T = (C2/U − C2) ×U + C2 C2/U = (2 − U) U

U – Utilization of I/O VCPU running PIBS T – Period of Main VCPU

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Adaptive Mixed-Criticality (AMC)

◮ AMC tasks defined by:

◮ Period (Ti), Deadline (Di) ◮ Vector of Capacities (−

→ Ci) for each criticality level

◮ System operates in one of a set of criticality levels

◮ e.g., Criticality Level L ∈ {LO, HI} ◮ HI-criticality task, Ci(HI)≥Ci(LO) ◮ LO-criticality task, Ci(HI) is undefined 14 / 25

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Adaptive Mixed-Criticality (AMC)

◮ System starts in LO-criticality mode ◮ If a task uses its entire capacity and does not signal job

completion, the system switches into HI-criticality mode

◮ Only HI-criticality tasks run in HI-criticality mode, using

their Ci(HI) capacity

◮ Allows extra capacity to finish HI-criticality jobs before

their deadlines

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I/O-Adaptive Mixed-Criticality (IO-AMC)

◮ Extended AMC to include PIBS for I/O requests ◮ Response time (schedulability) analysis considers

◮ when tasks are in HI-criticality mode ◮ when tasks are in LO-criticality mode ◮ when tasks switch from LO- to HI-criticality mode ◮ added interference by PIBS

C1 = (T − C2)·U = (T − UT)·U

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I/O-Adaptive Mixed-Criticality (IO-AMC)

◮ We saw added execution time by a PIBS task is

C1 = (T − C2)·U = (T − UT)·U

◮ Added interference I q k by PIBS τk assigned to SS τq...

I q

k (t) = (Tq−TqUk) Uk +

t Tq

  • TqUk

= (1 − Uk) TqUk + t Tq

  • TqUk

=

  • 1 +

t Tq

  • − Uk
  • TqUk

◮ IO-AMC response time bound adds I q k for each PIBS τk

to system of Sporadic Servers

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I/O-Adaptive Mixed-Criticality (IO-AMC)

◮ For each PIBS τk, have a vector of utilizations −

− − → Uk(L) for each criticality level L

◮ If τk is a HI-crit PIBS then Uk(HI)≥Uk(LO) ◮ If τk is a LO-crit PIBS then Uk(LO) > Uk(HI) ◮ Then I q k (t, L) is the interference by PIBS τk assigned to

SS τq at time t in criticality level L

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Quest Experiments

Task C (LO) or U (LO) C (HI) or U (HI) T Camera Task (HI-criticality) 23ms 40ms 100ms CPU Task (LO-criticality) 10ms 1ms 100ms Bottom Half (PIBS) U (LO) = 1% U (HI) = 2% 100ms Bottom Half (SS) 1ms 2ms 100ms

Task Set Parameters – Bottom Half handles Camera interrupts

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Scheduling Overhead - One USB Camera

0.1 0.2 0.3 0.4 0.5 0.6 0.7 20 40 60 80 100 120 140 160 180 CPU % Time (seconds) PIBS Sporadic Server

Quest on Intel Core i3-2100 @ 3.1KHz Camera – U(LO) = 1% (1ms/100ms), U(HI) = 2% (2ms/100ms) Scheduling overhead of SS-only scheme > SS+PIBS

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Scheduling Overhead - Two USB Cameras

0.1 0.2 0.3 0.4 0.5 0.6 0.7 20 40 60 80 100 120 140 160 180 CPU % Time (seconds) PIBS Sporadic Server

Camera 1 – U(LO) = 1% (1ms/100ms), U(HI) = 2% (2ms/100ms) Camera 2 – U(LO) = 2% (2ms/100ms), U(HI) = 1% (1ms/100ms)

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Extra Interference Forcing a Mode Change

1 2 3 4 5 Server Type Job Completion Time (seconds) HI-Criticalty Task (SS+PIBS) LO-Criticalty Task (SS+PIBS) HI-Criticalty (SS-Only) LO-Criticalty (SS-Only)

SS-only server for camera interrupts causes task on Main VCPU to deplete budget before job completion. Mode change with SS-Only causes LO-crit jobs to finish later.

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Different Criticality Devices

1x106 2x106 3x106 4x106 5x106 6x106 7x106 10 20 30 40 50 60 Total Bytes Read Time (seconds) Camera 1 Camera 2

◮ Can assign criticality levels to devices to control

bandwidth

◮ Mode change at 30 seconds ◮ Camera 1 – U(LO) = 0.1%, U(HI) = 1% ◮ Camera 2 – U(LO) = 1%, U(HI) = 0.1%

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Conclusions and Future Work

◮ Added IO-AMC support to Quest RTOS ◮ Simulations (& analysis) show SS for both tasks &

interrupt handlers is theoretically better than SS+PIBS

◮ Expts show PIBS for interrupt handling incurs lower

practical costs

◮ Ability to assign criticality levels to devices ◮ Future work to consider more complex scenarios where

blocking I/O delays impact task execution

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Scheduling Results

0 % 20 % 40 % 60 % 80 % 100 % 0.2 0.4 0.6 0.8 1 Schedulable Task Sets Utilization AMC UB IO-AMC UB AMC-rtb IO-AMC-rtb

500 random task sets per utilization [see paper]. Theoretical performance of IO-AMC-rtb slightly worse than AMC-rtb. This is due to the extra interference PIBS can cause compared to an equivalent Sporadic Server.

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