On- board PCs f or interf acing f ront- end electronics J COP t eam - - PowerPoint PPT Presentation

on board pcs f or interf acing f ront end electronics
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On- board PCs f or interf acing f ront- end electronics J COP t eam - - PowerPoint PPT Presentation

On- board PCs f or interf acing f ront- end electronics J COP t eam meet ing April 10, 2002 Niko Neuf eld CERN/ EP 1 Controlling Boards The traditional approach Parallel Bus (VME, Fast bus, ) Ethernet Cont rol St at ion Crat e Cont


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SLIDE 1

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On- board PCs f or interf acing f ront- end electronics

J COP t eam meet ing

April 10, 2002

Niko Neuf eld CERN/ EP

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SLIDE 2

Niko NEUFELD CERN, EP

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Controlling Boards The traditional approach

Crat e Cont roller (CPU) Elect ronics Modules Parallel Bus (VME, Fast bus,… )

Ethernet

Cont rol St at ion

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SLIDE 3

Niko NEUFELD CERN, EP

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Traditional board control

  • Bus based cont rol syst em
  • Each board in a crat e is cont rolled via a bus (VME

et c.) eit her by a dedicat ed crat e processor (e.g. RI O) or has a dedicat ed int erf ace t o a remot e processor (usually a PC)

  • The crat es can be chained via a bus int erconnect
  • The crat e processor is connect ed t o t he cont rol

syst em via a LAN (Et hernet )

  • The main disadvant ages are t hat

– a f ault y module can block access t o a whole crat e/ chain – t he f ault y module is dif f icult t o isolat e once t he bus is blocked – t he crat e processors / local int erf ace - PC combinat ions are expensive

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Niko NEUFELD CERN, EP

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Point- to- point board control

Standard Application Specific

Power Connectors LAN

I/O I/O

FPGAs Regs

e.g. 9Ux400mm

LUTs DSPs

Reset

PC

  • Configuration
  • Monitoring
  • Diagnostics
  • Debugging
  • ...

ADCs TDCs etc...

CONTROL INTERFACE access to

  • n board

components

Only interface to the board

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Niko NEUFELD CERN, EP

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Board control without a bus

  • Each board has a single point -t o-point

connect ion t o t he cont rol syst em

  • 100 MBit Et hernet provides lot s of

bandwidt h at a negligible cost (swit ch port s ~ 40 CHF)

  • Embedded PCs provide a versat ile local

ent r y point on each board

  • Many (20 t o 50) embedded PCs can be

boot ed, conf igured and cont rolled f rom a single Cont rol Server PC

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Niko NEUFELD CERN, EP

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Commercial embedded PCs

  • Small embedded PCs built around micro-cont rollers
  • Many product s based on various core chips, 1 BCHF

market , growing f ast

  • Applicat ions include: Web t erminals, set t op boxes,

embedded Web servers, digit al TV wit h int egrat ed I nt ernet browsers, swit ching st at ions, elect ronic t elephone books, navigat ion syst ems, passenger ent ert ainment , onboard I nt ernet t erminals, ATMs, vending machines, inf ormat ion t erminals , heart monit ors, blood analyzers, brain act ivit y analyzers, X-ray equipment , comput er-aided t omographs, dat a loggers, machine cont rollers, programmable logic cont rollers (PLCs), mobile dat a input devices, f light calculat ors f or unmanned f light equipment , communicat ions servers, and addit ional ext remely rugged milit ary applicat ions

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Niko NEUFELD CERN, EP

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LHCb requirements

  • The embedded PC must be accessible via

st andard 100 MBit Et hernet

  • We have ident if ied and recommended

t hree main ways t o conf igure and monit or devices such as FPGAs, DSPs and ot her chips:

– I 2C, J TAG and a simple parallel bus Ot her ways are in principle possible (wit h some reservat ions) but discouraged: e.g. PCI or I SA

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Niko NEUFELD CERN, EP

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The LHCb choice

  • Surveying t he market f or suit able (small, cheap)

commercial devices brought f ort h an excellent candidat e ☺

  • SM586 by Digit al Logic: Credit Card size module

[66x85x6 mm] built around PC on-a-chip ZFx86 (low power Pent ium compat ible core @ 133 MHz), ~ 250 CHF in quant it ies

  • I ncludes all st andard PC int erf aces: RS232, I SA,

EI DE, PCI , USB

  • Plus add-ons dedicat ed f or embedded applicat ions:

Onboard Flash RAM f or primary OS boot , I 2C, BI OS cont rol via serial line

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Niko NEUFELD CERN, EP

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Electronics board controlled by a Credit- Card PC

Standard Application Specific

Power Connectors 100 Mbit Ethernet

I/O I/O

FPGAs Regs

E.g. 9Ux400mm

LUTs DSPs

Reset

PC

  • Configuration
  • Monitoring
  • Diagnostics
  • Debugging
  • ...

ADCs TDCs Etc...

CCPC I2C JTAG Parallel Bus PCI Bus GLUE CARD

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Niko NEUFELD CERN, EP

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The LHCb solution f or board control in non- radiation areas

  • Use commercial Credit -Card PC as an int erf ace
  • Use a st andard (home-made) glue-card t o provide

addit ional logic and provide a st andard pin-out f or developers

  • The individual board (designer) needs t o provide

(apart f rom t he board space) only one RJ 45 connect or on t he f ront -panel and a connect ion t o t he reset -line (on t he power-backplane)

  • Opt ional ext ra connect ors, if desired, could

include: serial line, keyboard, J TAG header et c.

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Niko NEUFELD CERN, EP

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The LHCb standard glue card

  • Final glue card (under

design) could provide

– more J TAG and I 2C int erf aces (necessit at es addit ional decoder logic on I SA bus) – simpler (cheaper) PLX local bridge (e.g. 9030)

  • Prot ot ype LHCb glue

card connect s t o CCPC and provides

– J TAG (f rom parallel port via Alt era Byt eBlast er) – Parallel local bus via PLX PCI 9080 bridge – Level adapt at ion f or serial port

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Niko NEUFELD CERN, EP

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Mechanical layout of the Credit- Card PC

SMART SM586PC

PLX PCI 9080 May be covered by f inal glue- board

123 mm 66 mm 85 mm 41 mm

25 mm

  • Glue board

is ~ 6 mm above PCB

  • Could put

shallow component s beneat h it

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Niko NEUFELD CERN, EP

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Central inf rastructure

  • Provide servers which give t he Credit Card

PCs access t o NFS and logging services

  • Provide cust omised OS f or t he CC-PCs

(Linux – current ly version 2.2.19)

  • Provide drivers and (local) API libraries f or

I 2C, J TAG and parallel bus and some specialised ut ilit y libraries (e.g. programming of FPGAs via st andard STAPL f iles)

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Niko NEUFELD CERN, EP

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I ntegration into the LHCb Experiment Control System

  • Framework Component provides

– Remot e access t o local libraries/ drivers (via DI M) – Predef ined conf igurat ions (“macros” / “mini-component s”) f or on-board devices (FPGAs, TTC devices, DSPs, delay chips, et c.) – Templat es f or user int erf aces, panels

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Niko NEUFELD CERN, EP

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40 MHz Clk

Shaper

PHOS4 Din Clk in Enc Ain

14 / 4 / Floppy

LAN

6 /

VGA

2 2

MS KB SMART

PCI

Byteblast er JTAG

PLX 9080

12 bit data

Altera

10K50E240 189pin data ad d 512Kx 18

VME Conn

EPM7160-100

Glue Logic JTAG

DATA ADD CONTR Dout C lk Add[18..0] Data[31..16] data ad d 512Kx 18 EEPROM

CY230 8-2

x1 x2

16-bit 80MHz 40MHz LAD[31..0] Control

ADC

CLK 11

I2C

IN 7 select 4

CLK I2C

9042

9 /

COM

J1 J2

Data[15..0]

8 JTAGConn User Conn. J1 J2 J3 RS232

Status 1: the CC- PC evaluation Board

  • 6U board

comprising 2 MB of RAM, FPGA, CC-PC, Phos4 I 2C programmable delay

  • FPGA t o drive

ADC and local bus; it is programmed via J TAG

  • Credit Card

PC works: the OS boots f rom the internal f lash RAM, runs f rom the network, can access board components

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Niko NEUFELD CERN, EP

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Status 2 & immediate f uture

  • Bet a versions of most of t he local API s
  • exis. The drivers f or I 2C and J TAG have

already been ext ensively t est ed and demonst rat ed t o work

  • The local bus driver is current ly being

t est ed using our evaluat ion board

  • The re-design of t he glue-card is under

way

  • Plan t o have “version 1” ready by 06/ 02