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CS 4410 Operating Systems
Processes
Summer 2011 Cornell University
Processes Summer 2011 Cornell University 1 Today From source - - PowerPoint PPT Presentation
CS 4410 Operating Systems Processes Summer 2011 Cornell University 1 Today From source code to output Programs Processes Invocation Managing many processes Bookkeeping (PCB) Switching between processes 2 Creating
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Summer 2011 Cornell University
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Source files (.c) compiler/ assembler Object files (.o) Linker
Program
(.exe) File in a standard format, such as ELF on Linux, Microsoft PE on Windows Header Code Initialized data BSS Symbol table Line numbers
static libraries (.a)
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Header Code Initialized data BSS Symbol table Line numbers
Program (on disk)
Code Initialized data BSS Heap Stack DLL’s mapped segments
Process (in memory)
loader
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– Child of a parent process. – The child might execute the same program as the parent. – But, it might execute a completely different routine. – In any case, the child is a separate process with its own
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in parent, fork() returns a non-zero integer
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in child, fork() returns a zero.
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difference allows parent and child to distinguish
main(int argc, char **argv) { char *myName = argv[1]; int cpid = fork(); if (cpid == 0) {
printf(“The child of %s is %d\n”, myName, getpid());
exit(0); } else { printf(“My child is %d\n”, cpid); exit(0); } }
fork() retsys
v0=0 v0=23874
– memory, operating system state
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programs, etc.)
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PCB Process state Process number Program counter Stack pointer General-purpose registers Memory management info Username of owner Scheduling information Accounting info
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− Process of switching CPU from one process to another − Very machine dependent for types of registers
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Processes hop across states as a result of:
a d m i t t e d clock interrupt descheduling I/O or event wait I/O or event completion dispatch done
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There may be many wait queues, one for each type of wait (specific device, timer, message,…). Ready Queue Header Wait Queue Header
head ptr tail ptr head ptr tail ptr
PCB B PCB A PCB C PCB X PCB M
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CISC: single instruction saves all state
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RISC: reserve registers for kernel
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Direct cost of loading/storing registers to/from main memory.
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No useful work.
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Opportunity cost of flushing useful caches (cache, TLB, etc.).
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Wait for pipeline to drain in pipelined processors.
– Some OSes don’t allow child to continue if parent terminates
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