SoC final meeting(1/28) The class overview (chapter 6, chapter8, - - PowerPoint PPT Presentation

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SoC final meeting(1/28) The class overview (chapter 6, chapter8, chapter11)

學 生：林士生 指導教授：周哲民

NCKU EE CAD ASI C Lab 2

Chapter 6 On-chip bus

Target: To introduce the interface design conceptually.

Study the communication between FPGA on logic module and ARM processor on core module. We will introduce the ARMB in detail.

Section distributed: 6.2 實驗原理 6.2.1 Overview of the AMBA specification

In this section, we will introduce the ARMB specification simply.

6.2.2 Introducing the AMBA AHB

In this section, we will introduce the ARMB AHB. 6.2.3 AMBA AHB signal list List the signal used in the hardware code.

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6.2.4 The Arm-based system overview Introduce the signal IO of every component

• AHB bus slave interface
• AHB bus master Interface
• The AHB Arbiter Interface
• The AHB Decoder Interface

6.3 引導實驗 We use a simple program to lead student understanding the ARMB. This program does the following tasks:

• 1. Determines DRAM size on the core module and sets

up the system controller.

• 2. Checks that the logic module is present in the AP

expansion position.

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• 3. Reports module information.
• 4. Sets the logic module clock frequencies.
• 5. Tests SSRAM for word, halfword, and byte

accesses.

• 6. Flashes the LEDs.
• 7. Remains in a loop that displays the switch values on

the LEDs. 6.4 實驗要求 To trace the hardware code and software code, indicate that software how to communicate with hardware using the ARMB interface. 6.5 問題與討論

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6.5 問題與討論

• 1. If we want to design an accumulator (1,2,3…) , how

could you do to implement it using the scratch code?

• 2. If we want to design a hardware using FPGA, how

could you do to add your code to the scratch code and debugger it ?

• 3. To study the ARMB bus standard, try to design a

simple ARMB interface. 6.6 參考文件及網頁

• 1. ARMB AHB standard 2.0.
• 2. The ARM-based platform document.

NCKU EE CAD ASI C Lab 6

Chapter 8 ASIC logic

Target: Using hardware language to implement Mp3 function and simulation result. By the course, we can study a traditional design flow. Section distributed: 8.2 實驗原理 The MP3 encoder/decoder system can be divided into two parts:

• high control complexity part (such as Huffman coding,

quantization/invert quantization, and stereo processing)

• high computation complexity part (such as poly phase

analysis/synthesis filter bank, MDCT/IMDCT). We will introduce subband coding and MDCT algorithm on the section.

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8.3 引導實驗 8.3.1 Analysis of Encoder Complexity

• 1. The test environment is Pentium III-450MHz with

256MB RAM.

• 2. We can find that the poly phase analysis filter bank,

MDCT, and the quantization dominate the encoding time.

• 3. The quantization is a table lookup iteration that

needs many memory accesses, thus we use a simplified software table lookup scheme to reduce memory access times

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8.3.2 Algorithm Simplification of Subband and MDCT In this section, we will introduce the hardware

• algorithm. By using the cosine symmetry, we can

reduce the multiplications. 8.3.3 Implementation of Poly Phase Analysis Filter Bank We can divide the entire poly phase analysis filter bank into two main parts, the shifting-windowing part, and the SMDCT part. We will introduce the scheduling in detail. Finally, we can get the allocation

• f the poly phase filter bank.

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8.3.4 Implementation of MDCT The MDCT include the multiplying and accumulating (MA) iteration and the aliasing reduction part. 8.3.5 simulation result 8.4 實驗要求 To trace the hardware code and draw the signal IO of every function block. Try to find the relation of every .v files.

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8.5 問題與討論

• 1. We will introduce the decoder algorithm on chapter 11,

try to implement it. You can use the method that introduced in the chapter (scheduling and allocation).

• 2. If we want to add the area or time constraint, how could

you do by changing the code? Try to analyze it. 8.6 參考文件與網頁

• 1. MPEG1 layer3 standard.
• 2. Hierarchical Interface Design Methodology: Using

Real-Time MPEG1 Audio layer3 codec as a case

NCKU EE CAD ASI C Lab 11

Chapter 11 Case design for term project

Target: Study how to use the ARM-based platform to implement Mp3 system. In this chapter, we will describe the Mp3 algorithm in detail. Section distributed: 11.2 實驗原理 11.2.1 Detail of design method and corresponding algorithm

• Introduction to MPEG Audio Layer III

Encoding (overview)

• Grammar Introduction
• Detail Description of Encoding

About the decoder part algorithm, we will attaché to the reference file.

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11.3 引導實驗 In this section, we will introduce the mp3 software file (.cpp) in detail. We will introduce the hardware module. 11.3.1 實驗步驟 We divide our program into two parts: Hardware: In this part, we will show how to design our hardware IP into ARMB as a slave. Software: In this part, we will write the test music into SDRAM. Using the AXD to check the value.

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11.4 實驗要求 Try to understand the communication between the software part and hardware part. To check the computing result is correct. You can easily check that the

• utput value from the FPGA on LM.

11.5 問題與討論 We describe the decoder part algorithm on reference 3, try to implement it on ARM-based platform. You can divide to two parts: software & hardware. Hint: we will give you the mp3 software, try to analyze the code. On hardware part, you can refer to chapter 8. And software/hardware co-design, you can refer to section 11.3 on this chapter.

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11.6 參考文件及網頁

• 1. ARM-platform document.
• 2. MPEG 1 layer 3 standard.
• 3. Hierarchical Interface Design Methodology: Using

Real-Time MPEG1 Audio layer3 codec as a case