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Soutenance dhabilitation Verification of Embedded Systems - - PowerPoint PPT Presentation

Soutenance dhabilitation Verification of Embedded Systems Algorithms and Complexity Nicolas Markey LSV, CNRS & ENS Cachan, France April 8, 2011 Verification of embedded systems Computers are everywhere Verification of embedded


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Soutenance d’habilitation

Verification of Embedded Systems — Algorithms and Complexity — Nicolas Markey

LSV, CNRS & ENS Cachan, France

April 8, 2011

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SLIDE 2

Verification of embedded systems

Computers are everywhere

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Verification of embedded systems

Computers are everywhere Bugs are everywhere...

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SLIDE 4

Verification of embedded systems

Computers are everywhere Bugs are everywhere... Verification should be everywhere!

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SLIDE 5

Formal verification

provides (partial) proof of correctness; model-based methods; (more-or-less) exhaustive methods; (more-or-less) automated techniques.

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SLIDE 6

Formal verification

provides (partial) proof of correctness; model-based methods; (more-or-less) exhaustive methods; (more-or-less) automated techniques.

Different techniques

(model-based) testing

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SLIDE 7

Formal verification

provides (partial) proof of correctness; model-based methods; (more-or-less) exhaustive methods; (more-or-less) automated techniques.

Different techniques

(model-based) testing theorem proving

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SLIDE 8

Formal verification

provides (partial) proof of correctness; model-based methods; (more-or-less) exhaustive methods; (more-or-less) automated techniques.

Different techniques

(model-based) testing theorem proving model checking ...

system: ⇒ property:

G(request⇒F grant)

model-checking algorithm

yes/no

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SLIDE 9

Model checking

system:

property:

G(request⇒F grant)

model-checking algorithm

yes/no

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SLIDE 10

Embedded systems

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SLIDE 11

Embedded systems

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SLIDE 12

Outline of the presentation

1

Introduction

2

Verification of Open Systems

3

Verification of Timed Systems

4

Modelling Resources in Timed Systems

5

Perspectives

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SLIDE 13

Outline of the presentation

1

Introduction

2

Verification of Open Systems

3

Verification of Timed Systems

4

Modelling Resources in Timed Systems

5

Perspectives

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SLIDE 14

Reasoning about open systems

Concurrent games

A concurrent game is made of a transition system; q0 q1 q2

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Reasoning about open systems

Concurrent games

A concurrent game is made of a transition system; a set of agents; q0 q1 q2

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Reasoning about open systems

Concurrent games

A concurrent game is made of a transition system; a set of agents; a table indicating the transition to be taken given the actions

  • f the players.

q0 q1 q2 q0 q2 q1 q1 q0 q2 q2 q1 q0 player 1 player 2

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SLIDE 17

Reasoning about open systems

Alternating-time Temporal Logic

ATL formulas are built inductively using atomic propositions, Boolean combinations, and temporal modalities: U expresses that a

  • state will be

reached, and only

  • states are visited in the meantime.

strategy quantifiers: ⟨ ⟨A⟩ ⟩ 휑 expresses that agent (or coalition) A has a strategy to enforce 휑.

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SLIDE 18

Reasoning about open systems

Alternating-time Temporal Logic

ATL formulas are built inductively using atomic propositions, Boolean combinations, and temporal modalities: U expresses that a

  • state will be

reached, and only

  • states are visited in the meantime.

strategy quantifiers: ⟨ ⟨A⟩ ⟩ 휑 expresses that agent (or coalition) A has a strategy to enforce 휑. ✓ ⟨ ⟨ ⟩ ⟩ F ≡ ⟨ ⟨ ⟩ ⟩ true U

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SLIDE 19

Reasoning about open systems

Alternating-time Temporal Logic

ATL formulas are built inductively using atomic propositions, Boolean combinations, and temporal modalities: U expresses that a

  • state will be

reached, and only

  • states are visited in the meantime.

strategy quantifiers: ⟨ ⟨A⟩ ⟩ 휑 expresses that agent (or coalition) A has a strategy to enforce 휑. ✓ ⟨ ⟨ ⟩ ⟩ F ≡ ⟨ ⟨ ⟩ ⟩ true U × ⟨ ⟨ ⟩ ⟩ F

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SLIDE 20

Reasoning about open systems

Alternating-time Temporal Logic

ATL formulas are built inductively using atomic propositions, Boolean combinations, and temporal modalities: U expresses that a

  • state will be

reached, and only

  • states are visited in the meantime.

strategy quantifiers: ⟨ ⟨A⟩ ⟩ 휑 expresses that agent (or coalition) A has a strategy to enforce 휑. ✓ ⟨ ⟨ ⟩ ⟩ F ≡ ⟨ ⟨ ⟩ ⟩ true U × ⟨ ⟨ ⟩ ⟩ F ⟨ ⟨ ⟩ ⟩ G( ⟨ ⟨ ⟩ ⟩ F )

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SLIDE 21

Reasoning about open systems

Alternating-time Temporal Logic

ATL formulas are built inductively using atomic propositions, Boolean combinations, and temporal modalities: U expresses that a

  • state will be

reached, and only

  • states are visited in the meantime.

strategy quantifiers: ⟨ ⟨A⟩ ⟩ 휑 expresses that agent (or coalition) A has a strategy to enforce 휑. p p ✓ ⟨ ⟨ ⟩ ⟩ F ≡ ⟨ ⟨ ⟩ ⟩ true U × ⟨ ⟨ ⟩ ⟩ F ⟨ ⟨ ⟩ ⟩ G( ⟨ ⟨ ⟩ ⟩ F ) ≡ ⟨ ⟨ ⟩ ⟩ G p p

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SLIDE 22

Reasoning about open systems

Alternating-time Temporal Logic

ATL formulas are built inductively using atomic propositions, Boolean combinations, and temporal modalities: U expresses that a

  • state will be

reached, and only

  • states are visited in the meantime.

strategy quantifiers: ⟨ ⟨A⟩ ⟩ 휑 expresses that agent (or coalition) A has a strategy to enforce 휑. p p ✓ ⟨ ⟨ ⟩ ⟩ F ≡ ⟨ ⟨ ⟩ ⟩ true U × ⟨ ⟨ ⟩ ⟩ F × ⟨ ⟨ ⟩ ⟩ G( ⟨ ⟨ ⟩ ⟩ F ) ≡ ⟨ ⟨ ⟩ ⟩ G p p

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SLIDE 23

Reasoning about open systems

Alternating-time Temporal Logic

ATL formulas are built inductively using atomic propositions, Boolean combinations, and temporal modalities: U expresses that a

  • state will be

reached, and only

  • states are visited in the meantime.

strategy quantifiers: ⟨ ⟨A⟩ ⟩ 휑 expresses that agent (or coalition) A has a strategy to enforce 휑.

Theorem (AHK02, LMO07)

ATL model checking is PTIME-complete (or ΔP

3 -complete when

the transition table is encoded symbolically).

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Another semantics: ATL with strategy contexts [BDML09]

⟨ ⟨ ⟩ ⟩ G( ⟨ ⟨ ⟩ ⟩ F )

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Another semantics: ATL with strategy contexts [BDML09]

⟨ ⟨ ⟩ ⟩ G( ⟨ ⟨ ⟩ ⟩ F ) Evaluate the formula on the execution tree:

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Another semantics: ATL with strategy contexts [BDML09]

⟨ ⟨ ⟩ ⟩ G( ⟨ ⟨ ⟩ ⟩ F ) Evaluate the formula on the execution tree: apply a strategy of Player ;

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Another semantics: ATL with strategy contexts [BDML09]

⟨ ⟨ ⟩ ⟩ G( ⟨ ⟨ ⟩ ⟩ F ) Evaluate the formula on the execution tree: apply a strategy of Player ; in the remaining tree, check that Player can always enforce a visit to .

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What ATLsc can express

All ATL∗ properties;

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What ATLsc can express

All ATL∗ properties; Client-server interactions for accessing a shared resource: ⟨ ⋅Server⋅ ⟩ G ⎡ ⎢ ⎢ ⎢ ⎢ ⎣ ⋀

c∈Clients

⟨ ⋅c⋅ ⟩ F accessc ∧ ¬ ⋀

c∕=c′

accessc ∧ accessc′ ⎤ ⎥ ⎥ ⎥ ⎥ ⎦

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SLIDE 30

What ATLsc can express

All ATL∗ properties; Client-server interactions for accessing a shared resource: ⟨ ⋅Server⋅ ⟩ G ⎡ ⎢ ⎢ ⎢ ⎢ ⎣ ⋀

c∈Clients

⟨ ⋅c⋅ ⟩ F accessc ∧ ¬ ⋀

c∕=c′

accessc ∧ accessc′ ⎤ ⎥ ⎥ ⎥ ⎥ ⎦ Existence of Nash equilibria: ⟨ ⋅A1, ..., An⋅ ⟩ ⋀

i

( ⟨ ⋅Ai⋅ ⟩ 휑Ai ⇒ 휑Ai)

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What ATLsc can express

All ATL∗ properties; Client-server interactions for accessing a shared resource: ⟨ ⋅Server⋅ ⟩ G ⎡ ⎢ ⎢ ⎢ ⎢ ⎣ ⋀

c∈Clients

⟨ ⋅c⋅ ⟩ F accessc ∧ ¬ ⋀

c∕=c′

accessc ∧ accessc′ ⎤ ⎥ ⎥ ⎥ ⎥ ⎦ Existence of Nash equilibria: ⟨ ⋅A1, ..., An⋅ ⟩ ⋀

i

( ⟨ ⋅Ai⋅ ⟩ 휑Ai ⇒ 휑Ai) Existence of dominating strategy: ⟨ ⋅A⋅ ⟩ [ ⋅B⋅ ] ( ¬ 휑 ⇒ [ ⋅A⋅ ] ¬ 휑)

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Verifying ATLsc properties

Theorem (DLM10)

Given a CGS 풞, a state ℓ0 and an ATLsc formula 휑, we can build an alternating parity tree automaton 풜 s.t. ℒ(풜) ∕= ∅ ⇔ 풞, ℓ0 ∣ =∅ 휑. 풜 has size d-exponential, where d is the maximal number of nested quantifiers in 휑. Checking whether 풞, ℓ0 ∣ =∅ 휑 is in (d+1)-EXPTIME.

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Verifying ATLsc properties

Theorem (DLM10)

Given a CGS 풞, a state ℓ0 and an ATLsc formula 휑, we can build an alternating parity tree automaton 풜 s.t. ℒ(풜) ∕= ∅ ⇔ 풞, ℓ0 ∣ =∅ 휑. 풜 has size d-exponential, where d is the maximal number of nested quantifiers in 휑. Checking whether 풞, ℓ0 ∣ =∅ 휑 is in (d+1)-EXPTIME.

Proposition (DLM11 [unpublished])

Checking whether 풞, ℓ0 ∣ =∅ 휑 is (d−1)-EXPSPACE-hard.

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Verification of open systems: conclusions and perspectives

ATL model checking:

revisiting of the basic setting; [LMO07, LMO08] extension to the timed setting; [LMO06, BLMO07] “strategy-context” semantics, useful for non-zero-sum

  • bjectives;

[BDLM09, DLM10]

Boolean Nash equilibria in concurrent (timed) games; [BBM10a, BBM10b] Permissive strategies. [BDMR09, BMOU11] Current research directions:

Better understanding of ATLsc and Strategy Logic; Quantitative Nash equilibria; Permissive strategies in the timed setting.

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SLIDE 35

Outline of the presentation

1

Introduction

2

Verification of Open Systems

3

Verification of Timed Systems

4

Modelling Resources in Timed Systems

5

Perspectives

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SLIDE 36

Reasoning about timed systems

Timed automata

A timed automaton is made of a transition system,

Example

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SLIDE 37

Reasoning about timed systems

Timed automata

A timed automaton is made of a transition system, a set of clocks,

Example

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SLIDE 38

Reasoning about timed systems

Timed automata

A timed automaton is made of a transition system, a set of clocks, a labelling of transitions with timing informations.

Example

x=1 y:=0 x≤2, x:=0 y≥2, y:=0 x=0 ∧ y≥2

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SLIDE 39

Reasoning about timed systems

Timed automata

A timed automaton is made of a transition system, a set of clocks, a labelling of transitions with timing informations.

Example

x=1 y:=0 x≤2, x:=0 y≥2, y:=0 x=0 ∧ y≥2 y x 1 1 2 2

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Reasoning about timed systems

Timed automata

A timed automaton is made of a transition system, a set of clocks, a labelling of transitions with timing informations.

Example

x=1 y:=0 x≤2, x:=0 y≥2, y:=0 x=0 ∧ y≥2 y x 1 1 2 2

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Reasoning about timed systems

Timed automata

A timed automaton is made of a transition system, a set of clocks, a labelling of transitions with timing informations.

Example

x=1 y:=0 x≤2, x:=0 y≥2, y:=0 x=0 ∧ y≥2 y x 1 1 2 2

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SLIDE 42

Reasoning about timed systems

Timed automata

A timed automaton is made of a transition system, a set of clocks, a labelling of transitions with timing informations.

Example

x=1 y:=0 x≤2, x:=0 y≥2, y:=0 x=0 ∧ y≥2 y x 1 1 2 2

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SLIDE 43

Reasoning about timed systems

Timed automata

A timed automaton is made of a transition system, a set of clocks, a labelling of transitions with timing informations.

Example

x=1 y:=0 x≤2, x:=0 y≥2, y:=0 x=0 ∧ y≥2 y x 1 1 2 2

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Reasoning about timed systems

Timed automata

A timed automaton is made of a transition system, a set of clocks, a labelling of transitions with timing informations.

Example

x=1 y:=0 x≤2, x:=0 y≥2, y:=0 x=0 ∧ y≥2 y x 1 1 2 2

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Reasoning about timed systems

Timed automata

A timed automaton is made of a transition system, a set of clocks, a labelling of transitions with timing informations.

Example

x=1 y:=0 x≤2, x:=0 y≥2, y:=0 x=0 ∧ y≥2 y x 1 1 2 2

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SLIDE 46

Reasoning about timed systems

Timed automata

A timed automaton is made of a transition system, a set of clocks, a labelling of transitions with timing informations.

Example

x=1 y:=0 x≤2, x:=0 y≥2, y:=0 x=0 ∧ y≥2 y x 1 1 2 2

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SLIDE 47

Reasoning about timed systems

Timed automata

A timed automaton is made of a transition system, a set of clocks, a labelling of transitions with timing informations.

Example

x=1 y:=0 x≤2, x:=0 y≥2, y:=0 x=0 ∧ y≥2 y x 1 1 2 2

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SLIDE 48

Reasoning about timed systems

Timed automata

A timed automaton is made of a transition system, a set of clocks, a labelling of transitions with timing informations.

Example

x=1 y:=0 x≤2, x:=0 y≥2, y:=0 x=0 ∧ y≥2 y x 1 1 2 2

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SLIDE 49

Reasoning about timed systems

Timed automata

A timed automaton is made of a transition system, a set of clocks, a labelling of transitions with timing informations.

Example

x=1 y:=0 x≤2, x:=0 y≥2, y:=0 x=0 ∧ y≥2 y x 1 1 2 2

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SLIDE 50

Reasoning about timed systems

Timed automata

A timed automaton is made of a transition system, a set of clocks, a labelling of transitions with timing informations.

Theorem (AD90)

Reachability in timed automata is PSPACE-complete.

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SLIDE 51

Implementing timed automata

The semantics of timed automata is not realistic

timed automata real-life CPUs frequency precision synchronization infinite finite arbitrary bounded perfect delayed

  • Some properties may be lost at implementation.
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Implementing timed automata

The semantics of timed automata is not realistic

timed automata real-life CPUs frequency precision synchronization infinite finite arbitrary bounded perfect delayed

  • Some properties may be lost at implementation.

Program semantics (DDR04)

A different semantics modelling the behaviour on a CPU;

  • ver-approximated by the enlarged semantics:

x ∈ [a, b] x ∈ [a − Δ, b + Δ].

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Robust safety

Example

y x 1 1 2 2 3 3 x=1 y:=0 x≤2, x:=0 y≥2, y:=0 x=0 ∧ y≥2

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SLIDE 54

Robust safety

Example

y x 1 1 2 2 3 3 x=1 y:=0 x≤2, x:=0 y≥2, y:=0 x=0 ∧ y≥2

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SLIDE 55

Robust safety

Example

y x 1 1 2 2 3 3 x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

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SLIDE 56

Robust safety

Example

y x 1 1 2 2 3 3 x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

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SLIDE 57

Robust safety

Example

y x 1 1 2 2 3 3 x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

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SLIDE 58

Robust safety

Example

y x 1 1 2 2 3 3 x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

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SLIDE 59

Robust safety

Example

y x 1 1 2 2 3 3 x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

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SLIDE 60

Robust safety

Example

y x 1 1 2 2 3 3 x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

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SLIDE 61

Robust safety

Example

y x 1 1 2 2 3 3 x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

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SLIDE 62

Robust safety

Example

y x 1 1 2 2 3 3 x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

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SLIDE 63

Robust safety

Example

y x 1 1 2 2 3 3 x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

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SLIDE 64

Robust safety

Example

y x 1 1 2 2 3 3 x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

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SLIDE 65

Robust safety

Example

y x 1 1 2 2 3 3 x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

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SLIDE 66

Robust safety

Example

y x 1 1 2 2 3 3 x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

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SLIDE 67

Checking robust safety – Extended region automaton

For any location ℓ and any two regions r and r′, if r ∩ r′ ∕= ∅ and (ℓ, r′) belongs to an SCC of ℛ(풜), then we add a transition (ℓ, r)

− → (ℓ, r′).

y x 1 1 2 2 3 3

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SLIDE 68

Checking robust safety – Extended region automaton

For any location ℓ and any two regions r and r′, if r ∩ r′ ∕= ∅ and (ℓ, r′) belongs to an SCC of ℛ(풜), then we add a transition (ℓ, r)

− → (ℓ, r′).

y x 1 1 2 2 3 3

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SLIDE 69

Checking robust safety – Extended region automaton

For any location ℓ and any two regions r and r′, if r ∩ r′ ∕= ∅ and (ℓ, r′) belongs to an SCC of ℛ(풜), then we add a transition (ℓ, r)

− → (ℓ, r′).

y x 1 1 2 2 3 3

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SLIDE 70

Checking robust safety – Extended region automaton

For any location ℓ and any two regions r and r′, if r ∩ r′ ∕= ∅ and (ℓ, r′) belongs to an SCC of ℛ(풜), then we add a transition (ℓ, r)

− → (ℓ, r′). 훾

y x 1 1 2 2 3 3

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SLIDE 71

Checking robust safety – Extended region automaton

For any location ℓ and any two regions r and r′, if r ∩ r′ ∕= ∅ and (ℓ, r′) belongs to an SCC of ℛ(풜), then we add a transition (ℓ, r)

− → (ℓ, r′). 훾

y x 1 1 2 2 3 3

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SLIDE 72

Checking robust safety – Extended region automaton

For any location ℓ and any two regions r and r′, if r ∩ r′ ∕= ∅ and (ℓ, r′) belongs to an SCC of ℛ(풜), then we add a transition (ℓ, r)

− → (ℓ, r′). 훾

y x 1 1 2 2 3 3

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SLIDE 73

Checking robust safety – Extended region automaton

For any location ℓ and any two regions r and r′, if r ∩ r′ ∕= ∅ and (ℓ, r′) belongs to an SCC of ℛ(풜), then we add a transition (ℓ, r)

− → (ℓ, r′).

Theorem (DDMR04, DDMR08)

Robust safety checking is PSPACE-complete.

Theorem (BMR06)

Robust LTL model checking is PSPACE-complete.

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SLIDE 74

Robust model checking – Channel automata

Channel automaton

A channel automaton with rewriting and occurrence testing is made of a transition system, an unbounded FIFO channel, a labelling of transition with channel read/write informations.

Example

s# s t t# s

#! #? #! #? a!,b! a→{a,b} a?,b? zero(a)?

# a b

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SLIDE 75

Robust model checking – Channel automata

Channel automaton

A channel automaton with rewriting and occurrence testing is made of a transition system, an unbounded FIFO channel, a labelling of transition with channel read/write informations.

Proposition (BMOW07)

Cycle-bounded reachability in channel automata with rewriting and

  • ccurrence testing is PSPACE-complete.
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SLIDE 76

Robust model checking – Channel automata

Encoding timed automata as channel automata

  • ne time unit = one cycle of the channel
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SLIDE 77

Robust model checking – Channel automata

Encoding timed automata as channel automata

  • ne time unit = one cycle of the channel

Example

x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

state of 풞

⌊x⌋=0 ⌊y⌋=0

x, y Δ Δ Δ Δ

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SLIDE 78

Robust model checking – Channel automata

Encoding timed automata as channel automata

  • ne time unit = one cycle of the channel

Example

x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

state of 풞

⌊x⌋=0 ⌊y⌋=0

Δ x, y Δ Δ Δ

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SLIDE 79

Robust model checking – Channel automata

Encoding timed automata as channel automata

  • ne time unit = one cycle of the channel

Example

x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

state of 풞

⌊x⌋=0 ⌊y⌋=0

Δ Δ x, y Δ Δ

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SLIDE 80

Robust model checking – Channel automata

Encoding timed automata as channel automata

  • ne time unit = one cycle of the channel

Example

x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

state of 풞

⌊x⌋=0 ⌊y⌋=0

Δ Δ Δ x, y Δ Δ Δ Δ x, y Δ

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SLIDE 81

Robust model checking – Channel automata

Encoding timed automata as channel automata

  • ne time unit = one cycle of the channel

Example

x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

state of 풞

⌊x⌋=0 ⌊y⌋=0

Δ Δ Δ Δ x, y

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SLIDE 82

Robust model checking – Channel automata

Encoding timed automata as channel automata

  • ne time unit = one cycle of the channel

Example

x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

state of 풞

⌊x⌋=0 ⌊y⌋=0 waiting for x

y Δ Δ Δ Δ x, y

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SLIDE 83

Robust model checking – Channel automata

Encoding timed automata as channel automata

  • ne time unit = one cycle of the channel

Example

x∈[1−Δ,1+Δ] y:=0 x≤2+Δ, x:=0 y≥2−Δ, y:=0 x≤Δ ∧ y≥2−Δ

state of 풞

⌊x⌋=1 ⌊y⌋=0

x y Δ Δ Δ Δ

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SLIDE 84

Robust model checking – Channel automata

Encoding timed automata as channel automata

  • ne time unit = one cycle of the channel

Theorem (BMR08)

Robust model checking for CoFlatMTL is EXPSPACE-complete.

Theorem (BMS11 [unpublished])

Robust safety can be checked in PSPACE using channel automata.

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SLIDE 85

Verification of timed systems: conclusions and perspectives

Timed automata are a well-established formalism for modelling real-time systems.

separation of MTL and TPTL; [BCM05, BCM10] definition of a decidable extension of MITL with punctuality; [BMOW07, BMOW08] implementability issues. [DDMR04, BMR06, DDMR08, BMR08]

Current research directions:

Study different approaches to implementability issues; Synthesis of implementable systems.

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SLIDE 86

Outline of the presentation

1

Introduction

2

Verification of Open Systems

3

Verification of Timed Systems

4

Modelling Resources in Timed Systems

5

Perspectives

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SLIDE 87

Modelling resources

Weighted timed automata

A weighted timed automaton is made of a timed automaton;

Example

y=0 x≤2, y:=0 x≥3 x≥3

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SLIDE 88

Modelling resources

Weighted timed automata

A weighted timed automaton is made of a timed automaton; cost variables;

Example

y=0 x≤2, y:=0 x≥3 x≥3

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SLIDE 89

Modelling resources

Weighted timed automata

A weighted timed automaton is made of a timed automaton; cost variables; cost information on states and transitions.

Example

˙ p=5 y=0 ˙ p=6 ˙ p=1 x≤2, y:=0 p+=2 x≥3 p+=1 p+=7 x≥3

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SLIDE 90

Modelling resources

Weighted timed automata

A weighted timed automaton is made of a timed automaton; cost variables; cost information on states and transitions.

Example

˙ p=5 y=0 ˙ p=6 ˙ p=1 x≤2, y:=0 p+=2 x≥3 p+=1 p+=7 x≥3 1.3 1.7

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SLIDE 91

Modelling resources

Weighted timed automata

A weighted timed automaton is made of a timed automaton; cost variables; cost information on states and transitions.

Example

˙ p=5 y=0 ˙ p=6 ˙ p=1 x≤2, y:=0 p+=2 x≥3 p+=1 p+=7 x≥3

cost:

1.3 1.3×5=4.5 2 1.7 1.7×6=10.2 1

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SLIDE 92

Modelling resources

Weighted timed automata

A weighted timed automaton is made of a timed automaton; cost variables; cost information on states and transitions.

Theorem (ALP01, BFH+01, BBL04)

Optimal reachability is PSPACE-complete in weighted timed automata.

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SLIDE 93

Energy constraints – lower-bound constraints

Example

+2 +8 −2

−1 −2 x=1 x:=0 p x 1 2 3 4 5 1

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SLIDE 94

Energy constraints – lower-bound constraints

Example

+2 +8 −2

−1 −2 x=1 x:=0 p x 1 2 3 4 5 1

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SLIDE 95

Energy constraints – lower-bound constraints

Example

+2 +8 −2

−1 −2 x=1 x:=0 p x 1 2 3 4 5 1

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SLIDE 96

Energy constraints – lower-bound constraints

Example

+2 +8 −2

−1 −2 x=1 x:=0 p x 1 2 3 4 5 1

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SLIDE 97

Energy constraints – lower-bound constraints

Example

+2 +8 −2

−1 −2 x=1 x:=0 p x 1 2 3 4 5 1

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SLIDE 98

Energy constraints – lower-bound constraints

Example

+2 +8 −2

−1 −2 x=1 x:=0 p x 1 2 3 4 5 1

Theorem (BFLMS08, BFLM10)

Optimization under lower-bound constraint is decidable on

  • ne-clock weighted timed automata.
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SLIDE 99

Energy constraints – lower-bound constraints

Example

+2 +8 −2

−1 −2 x=1 x:=0 p x 1 2 3 4 5 1

dp dt =8⋅p

Theorem (BFLMS08, BFLM10)

Optimization under lower-bound constraint is decidable on

  • ne-clock weighted timed automata (also for exponential costs).
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SLIDE 100

Energy constraints – Interval constraints

Example

+2 +8 −2

−1 −2 x=1 x:=0 p x 1 2 3 4 5 1

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SLIDE 101

Energy constraints – Interval constraints

Example

+2 +8 −2

−1 −2 x=1 x:=0 p x 1 2 3 4 5 1

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SLIDE 102

Energy constraints – Interval constraints

Example

+2 +8 −2

−1 −2 x=1 x:=0 p x 1 2 3 4 5 1

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SLIDE 103

Energy constraints – Interval constraints

Example

+2 +8 −2

−1 −2 x=1 x:=0 p x 1 2 3 4 5 1

Theorem (BFLMS08)

Reachability in one-clock weighted timed games is undecidable.

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SLIDE 104

Undecidability proof: encoding of a two-counter machine

−6 +1 30 −1 −n x:=0 +5 −5 −5 +5 x=1

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SLIDE 105

Undecidability proof: encoding of a two-counter machine

−6 30 −n x:=0 p=0 p=5 x=1

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SLIDE 106

Undecidability proof: encoding of a two-counter machine

−6 30 −n x:=0 p=0 p=5 x=1 p x 1 5−e

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SLIDE 107

Undecidability proof: encoding of a two-counter machine

−6 30 −n x:=0 p=0 p=5 x=1 p x 1 5−e

5−e 6

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SLIDE 108

Undecidability proof: encoding of a two-counter machine

−6 30 −n x:=0 p=0 p=5 x=1 p x 1 5−e

5−e 6

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SLIDE 109

Undecidability proof: encoding of a two-counter machine

−6 30 −n x:=0 p=0 p=5 x=1 p x 1 5−e

5−e 6

5− ne

6

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SLIDE 110

Undecidability proof: encoding of a two-counter machine

−6 30 −n x:=0 p=0 p=5 x=1 p x 1 5−e

5−e 6

5− ne

6

e = 1 2c1 ⋅ 3c2 n = 3: increment c1 n = 2: increment c2 n = 12: decrement c1 n = 18: decrement c2

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SLIDE 111

Quantitative verification: conclusions and perspectives

Weighted timed automata are a natural framework for modelling and reasoning about resource consumption

WCTL model checking is undecidable, except when restricting to the one-clock setting; [BBM06, BLM07] same results for computing optimal strategies in weighted timed games; [BBM06, BLMR06] energy constraints: some decidability results. [BFLMS08, BFLM10]

Current research directions:

Optimization under lower-bound constraints:

decidability in the general case; extension to games;

Interval constraints:

can we compute an upper bound? what about weak upper bound?

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SLIDE 112

Outline of the presentation

1

Introduction

2

Verification of Open Systems

3

Verification of Timed Systems

4

Modelling Resources in Timed Systems

5

Perspectives

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SLIDE 113

Perspectives – Open systems

ATL with strategy contexts

Several remaining open questions:

satisfiability; corresponding behavioural equivalence, ...

Extension to randomized strategies; Extension to the timed setting.

  • PhD. thesis of Arnaud Da Costa-Lopes

Nash equilibria

Specialized algorithms for computing Nash equilibria; [BBM10a, BBM10b] Extension to quantitative objectives, randomized strategies,

  • ther kinds of equilibria, ...
  • PhD. thesis of Romain Brenguier
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SLIDE 114

Perspectives – Implementability of timed systems

Robustness and implementability

Robust-controller synthesis; Permissive strategies in a timed setting.

Efficient algorithms

Symbolic, zone-based algorithms.

Develop new approaches to implementability

Probabilistic approach to robustness (instead of worst-case); Shrinkable timed automata.

  • PhD. thesis of Ocan Sankur
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SLIDE 115

Perspectives – Robustness in weighted timed automata

Undecidability proofs require arbitrary precision

Energy constraints under imprecision: [MR10]

[0,1] [2,4] [−6,−3] x:=0, x=1, update x 1 1 2 3

  • revisit all undecidable problems in an imprecise setting.