Symbolic Model Checking for Large Software Specifications
William Chan Richard Anderson Paul Beame Steve Burns Francesmary Modugno David Jones (Boeing) David Notkin Jon D. Reese William Warner (Boeing)
Symbolic Model Checking for Large Software Specifications William - - PowerPoint PPT Presentation
Symbolic Model Checking for Large Software Specifications William Chan Richard Anderson Paul Beame Steve Burns Francesmary Modugno David Jones (Boeing) David Notkin Jon D. Reese William Warner (Boeing) Motivation: circa 1998-2000 How
William Chan Richard Anderson Paul Beame Steve Burns Francesmary Modugno David Jones (Boeing) David Notkin Jon D. Reese William Warner (Boeing)
– Inspection – Syntactic check – Simulation/testing – Theorem proving
– Effective also for software? – Many people’s conjecture: No
Model Checker
FALSE (with counterexample) TRUE
State Machine Behavioral Property
– Error states not reached (invariant)
⇐ Today’s focus
– Eventually ack for each request (liveness)
– Always possible to restart machine (possibility)
– TCAS II (aircraft collision avoidance system) [FSE 96, TSE 98] – Electrical power distribution (EPD) system on Boeing 777 [ICSE
99, TSE 00]
[ISSTA 98, ICSE 99, TSE 00] – Developed intuitions about efficiency – Enabled difficult analyses
– Combine with a constraint-satisfaction engine [CAV 97]
Y0 = Err Y1 ... Yn-1 Yn = Yn-1 Yn = Yn-1 Init
States that can reach an Error State Error States
Backward breadth-first search
36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126.
– Usually small; some large hardware circuits can be handled – Some well-known limitations
a > bc
– Few theoretical results known – Performance unpredictable
1 1 1
1
1 1 1 1 x1 x4 x3 x2
Odd Parity
Asynchronous Synchronous Synchronous Concurrency Possibly infinite Finite (except arithmetic) Finite States Often complex Simple (except arithmetic) Simple Data Multi-threaded Code Spec Hardware
– Tolerate failures in power sources and circuit breakers
LGen RGen ... LMain Rmain ...
power sources power buses circuit breakers
LGen RGen ... LMain Rmain ...
Model Checker
FALSE (with counterexample) TRUE
Boolean encoding Behavioral Property Spec
(with simple abstraction)
1 x[c]/y 1 y A B
VAR A: {0,1}; x: boolean; y: boolean; ASSIGN init (A):= 0; next (A):= case A=0 & x & c : 1; 1 : A; esac;
violations of fault tolerance inconsistent outputs, safety violations, etc. Problems we found simulation inspection, static analysis Prior verification 90 bits, 1027 states 230 bits, 1060 states State space EPD System TCAS II
macrostep microsteps inputs
– No new inputs within macrostep – Macrostep encoded as a sequence of transitions – Statecharts, Esterel [Berry & Gonthier 92], Lustre [Halbwachs et
1 x[c]/y 1 y A B
Y0 Y1 Y2 Reachable States
Y0 Y1 Y2 Reachable States Invariant
1 x[c]/y 1 y A B
1 2 3 4 5 6 7 8 9 10 Min. P1 P2 P3 P4 P5 P6 Without pruning With pruning >> 1 hour
A B 1 x[c]/y x[¬ c]/y x[¬ c]/y x[c]/y 1 y[A in 1] y[A in 0] y[A in 0] y[A in 1]
– Macrostep length: 2 – x → y → stable
1 x[c]/y 1 y A B
– x → y → stable – x → stable
x y,z w z x y,z w z x y,z w z
x y,z w z x y,z w z x y,z w z
x y,z w z x w z x
x y,z w z x w z x
— Use multiple BDDs for transition relation.
– Remove part of system that can’t affect result.
– Avoid work in forward search.
– Synchronization, environmental assumptions, etc. – In addition to low-level BDD tricks.
– In addition to verification/falsification.
– Maybe applicable to synchronous programming languages.
– Seems promising.
– Applicable if environment not constrained.