TimingErrorDetec.on:AnAdap.ve SchemetoCombatVariability - - PowerPoint PPT Presentation

Timing
Error
Detec.on:
An
Adap.ve
 Scheme
to
Combat
Variability


EE
241
Final
Report
 Nathan
Narevsky
and
Richard
OE


Mo.va.on


• As
process
nodes


shrink,
there
are
 .ghter
constraints
due
 to
process
varia.ons


• What
are
the


appropriate
ways
of
 comparing
the
 different
TED
circuits
 available?
 


Razor
Latch


• Main
latch
and
shadow


latch
use
opposite
 phases
of
the
clock,
can
 check
to
see
if
a
 transi.on
occurs
that
 borrows
.me,
which
 means
the
path
driving
 the
latch
does
not
meet
 .ming


Timber
Latch


• When
enabled,
uses
the


path
controlled
by
L


• Creates
a
delayed


window
to
allow
.me
 borrowing
to
correct
for
 errors


Razor
FF


• Detects
transi.ons


during
the
.me
when
 CK
and
nCK
are
both
 high
using
the
dynamic


• r
gate.


Timber
FF


• Delays
are
controlled
to


determine
a
specific
 amount
of
.me
 borrowing
and
error
 detec.on


Setup
for
Analysis


• Detec.on
window
–
Sweep
the
edge
of
the


data
star.ng
from
right
before
the
rising
edge


• f
the
clock
into
the
clock
period,
enforcing


errors


• Repeat
over
a
range
of
supply
voltages
to


determine
the
minimum
opera.ng
voltage


• Measure
the
power
of
opera.on
for
circuits
at


both
nominal
and
minimal
vdd


Latch
Error
Detec.on
Width
Versus
 Supply
Voltage


0
 0.5
 1
 1.5
 2
 2.5
 3
 0.5
 0.6
 0.7
 0.8
 0.9
 1
 1.1
 Window
Width
(ns)
 Supply
Voltage
(V)
 Timber
Latch
 Bubble
Razor


Latch
Results


• FOM
=
Twindow
/


(P@Vmin)


• 5%
difference
in
error


.me
window


• 12.5%

Vmin
.mber


greater
than
Razor


• 35%
power
consump.on


.mber
greater
than
razor


Timber Latch
 Razor Latch
 Clk‐>
Q
 delay
 300.6ps
 300.7ps
 Power @1V
 30.35uW
 23.8uW
 V min 810mV
 720mV
 Power @ V min
 19.1uW
 14.1uW
 Nominal 
 2.31n
 2.43n
 FOM
 1.209
 1.723


Flip
Flop
Results


• 75%
difference
in
error


.me
window


• 4%

Vmin
.mber


greater
than
Razor


• 50%
power


consump.on
.mber
 greater
than
razor
 


Timber FF
 Razor FF
 Clk
to
Q
delay
 300.6ps
 300.5ps
 Power @1V
 32.03uW
 43.9uW
 V min 750mV
 780mV
 Power @ V min
 17.63uW
 26.5uW
 Nominal 
 37p
 65p
 FOM
 2.099
 2.453


Conclusion


• Razor
latch
out
performs
Timber
latch
for
all


measured
metrics


• Razor
Flip
Flop
allows
for
a
error
detec.on


window,
but
uses
significantly
more
power
while
 also
opera.ng
at
a
higher
Vdd


• Razor
latch
is
the
most
interes.ng
design,
and


could
be
morphed
into
a
FF
with
a
hard
edge.



• Both
FF
designs
have
their
advantages,
and
the


use
of
these
TED
circuits
is
highly
dependent
on
 the
design
goals