Towards A Formally Verified Network-on-Chip Tom van den Broek 1 - - PowerPoint PPT Presentation

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Towards A Formally Verified Network-on-Chip Tom van den Broek 1 Julien Schmaltz 12 1 Institute for Computing and Information Sciences Radboud University Nijmegen The Netherlands 2 School of Computer Science Open University The Netherlands

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SLIDE 1

Towards A Formally Verified Network-on-Chip

Tom van den Broek1 Julien Schmaltz12

1Institute for Computing and Information Sciences

Radboud University Nijmegen The Netherlands

2School of Computer Science

Open University The Netherlands t.vandenbroek@cs.ru.nl & julien.schmaltz@ou.nl

FMCAD ’09

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 2

Outline

Networks-on-Chips: Hermes

Implemented as model instance Characteristics:

XY minimal deterministic routing Wormhole switching Frame structure:

Header flit (Route Information) Data flits (Payload) Torn-down flit (Last flit)

TD DATA HD

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 3

Outline Network-on-Chips

Platform-Based Design and Networks-on-Chip

Platform-Based Design:

Re-use of parametric modules (Intellectual Properties) High-level of abstraction Communication-centric: from buses to networks

Solves the communication issues The components are connected in a communication network Advantages

Scalable Parallelism

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 4

Outline Network-on-Chips

Formal Methods and Networks-on-Chips

System Verification:

Proof of each component Proof of their interconnection

State-of-the-Art:

Model checking or theorem proving of instances of systems Often at hardware level (RTL)

The GeNoC Approach:

A generic model for reasoning about NoCs Reduces amount of the user interaction needed to prove properties on NoC instances

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 5

Outline Network-on-Chips

GeNoC approach

To be discharged for the given NoC Instantiated for the given NoC THEOREM messages reach their expected destination Routing Scheduling Interfaces Proof Obligations Proof Obligations Proof Obligations Proof Obligations Proof Obligations Proof Obligations

Y X

(1 1) (1 2) (0 0) (1 0) (2 0) (2 1) (0 1) (0 2) (2 2)

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 6

Outline Contribution and Method

Contribution

Original GeNoC Model

Highly abstract representation of the communications The model has access to the complete precomputed routes the messages will traverse in the network How does the specification level relates to the implementation level?

Contribution

A generic implementation model A (generic) specification model A refinement proof between two instances of these models

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 7

Outline Contribution and Method

Method - Specification model

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 8

Outline Contribution and Method

Method - Contribution

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 9

Models

Structure of the two models

Both models consist of two main parts: The NoC characteristics are defined in the Network model

Topology Router components:

Datalink Routing Scheduling

The Network interpreter takes a network model and simulates the network Implemented in ACL2

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 10

Models Model Structure

The main interpreter structure

Depart Stepnetwork Router UpdateNeighbours State Messages Updated state delayed van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 11

Models Interpreter

Network interpreter – Implementation Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

Depart Stepnetwork Router UpdateNeighbours State Messages Updated state delayed

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 12

Models Interpreter

Network interpreter – Implementation Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

M

Depart Stepnetwork Router UpdateNeighbours State Messages Updated state delayed

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 13

Models Interpreter

Network interpreter – Implementation Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

M

Depart Stepnetwork Router UpdateNeighbours State Messages Updated state delayed

ProcessInputs

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 14

Models Interpreter

Network interpreter – Implementation Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

M

Depart Stepnetwork Router UpdateNeighbours State Messages Updated state delayed

RouteControl

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 15

Models Interpreter

Network interpreter – Implementation Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

M

Depart Stepnetwork Router UpdateNeighbours State Messages Updated state delayed

FlowControl

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 16

Models Interpreter

Network interpreter – Implementation Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

M

Depart Stepnetwork Router UpdateNeighbours State Messages Updated state delayed

ProcessOutputs

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 17

Models Interpreter

Network interpreter – Implementation Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

M

Depart Stepnetwork Router UpdateNeighbours State Messages Updated state delayed

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 18

Models Interpreter

Network interpreter – Implementation Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

M

Depart Stepnetwork Router UpdateNeighbours State Messages Updated state delayed

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 19

Models Interpreter

Network interpreter – Specification Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

R-Depart Stepnetwork Spec-Router UpdateNeighbours State Messages Updated state delayed

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 20

Models Interpreter

Network interpreter – Specification Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

M ENL

R-Depart Stepnetwork Spec-Router UpdateNeighbours State Messages Updated state delayed

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 21

Models Interpreter

Network interpreter – Specification Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

M ENL

R-Depart Stepnetwork Spec-Router UpdateNeighbours State Messages Updated state delayed

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 22

Models Interpreter

Network interpreter – Specification Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

M ENL

R-Depart Stepnetwork Spec-Router UpdateNeighbours State Messages Updated state delayed

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 23

Models Interpreter

Network interpreter – Specification Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

M NL

R-Depart Stepnetwork Spec-Router UpdateNeighbours State Messages Updated state delayed

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 24

Models Interpreter

Network interpreter – Specification Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

M NL

R-Depart Stepnetwork Spec-Router UpdateNeighbours State Messages Updated state delayed

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 25

Models Interpreter

Network interpreter – Specification Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

M NL

R-Depart Stepnetwork Spec-Router UpdateNeighbours State Messages Updated state delayed

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 26

Models Interpreter

Network interpreter – Specification Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

M L

R-Depart Stepnetwork Spec-Router UpdateNeighbours State Messages Updated state delayed

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 27

Models Interpreter

Network interpreter – Specification Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

M L

R-Depart Stepnetwork Spec-Router UpdateNeighbours State Messages Updated state delayed

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 28

Models Interpreter

Network interpreter – Specification Level

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

M L

R-Depart Stepnetwork Spec-Router UpdateNeighbours State Messages Updated state delayed

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 29

Refinement proof

Proof concept

The implementation model is a refinement of the specification model

1

Given the same input the models should produce the same output

2

The messages should traverse the same paths in the network

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 30

Refinement proof

Proof concept

The implementation model is a refinement of the specification model

1

Given the same input the models should produce the same output

2

The messages should traverse the same paths in the network

impl spec‘

Transform

impl‘ spec

The Transform relation removes the routes from the network state

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 31

Refinement proof

Refinement theorem (1) – Correct-GeNoC

∀state, transactions : transform(GeNoCS(state, transactions)) = GeNoCI(state, transactions) GeNoCI and GeNoCS return a tuple of (arrived, delayed, trace) so this theorem can be read as:

1 The transformed arrived messages are equal 2 Delayed messages are equal 3 The transformed simulation trace is the same van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 32

Refinement proof

Proof - Structure

Pedicates

Correct-routing good-switch good-ntkst

Main theorem

eq-genoc_t eq-genoc arrived accup ntkmem delayed Valid-routes ntkst step-inputs step-flowcontrol step-outputs stepnetwork step-routing routinglogic-eq-next-hop Valid-routes

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 33

Refinement proof

Proof - Structure

Pedicates

Correct-routing good-switch good-ntkst

Main theorem

eq-genoc_t eq-genoc arrived accup ntkmem delayed Valid-routes ntkst step-inputs step-flowcontrol step-outputs stepnetwork step-routing routinglogic-eq-next-hop Valid-routes

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 34

Refinement proof

Example theorem - Routinglogic-eq-next-hop

∀msg : validRoute(msg) = ⇒ computeRoute(cur(msg))(dest(msg)) = getNextHop(msg) This theorem states: A message with a valid route implies that computing the next step in the route is equal to extracting it from the precomputed route.

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 35

Refinement proof

Proof - Statistics

Group number of Theorems Changed functions 72 Predicates 140 Not changed functions 88 Total 300

The source code of the proofs and models is available on the web 1

1http://www.cs.ru.nl/˜julien/Julien at Nijmegen/FMCAD09.html van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 36

Conclusion

Conclusion - overview

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 37

Conclusion

Conclusion - contributions

The contributions are: First cross-layer verification attempt of a NoC A realistic generic implementation model Multiple implementation instances of real NoCs

Packet, circuit, and wormhole switching XY and Spidergon routing Hermes NoC Octagon NoC

Instance of a NoC at the specification level Refinement proof between two instances

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 38

Conclusion

Conclusion - Future work

Current and future research directions: A generic cross-layer verification method Proof between two generic models at two different levels More instances of different NoCs Integration of deadlock and liveness properties (Verbeek & Schmaltz ACL2 ’09 and DATE ’10) Extending the number of layers

Towards RTL Layer with “Source” and “Distributed scheduling”

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 39

Conclusion

Thank you for listening!

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 40

Appendix

Network Model – Generic Router

Input Stage Routing Control Flow Control Output Stage

Buffer Data Input StatusField

ackRx Rx Data

Id Port Name Direction

Port Address Port Buffer Data Output StatusField

ackTx Tx Data

Id

Address

Port Name Direction

L W S E N L W S E N van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 41

Appendix

Wormhole switching and XY Routing

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 42

Appendix

Wormhole switching and XY Routing

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

H booked van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 43

Appendix

Wormhole switching and XY Routing

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

H D booked booked van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 44

Appendix

Wormhole switching and XY Routing

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

D booked booked H booked D van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 45

Appendix

Wormhole switching and XY Routing

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

T booked booked booked D booked D H van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 46

Appendix

Wormhole switching and XY Routing

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

booked booked booked D H T D booked van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 47

Appendix

Wormhole switching and XY Routing

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

booked D H booked booked D T booked van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 48

Appendix

Wormhole switching and XY Routing

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

booked booked D booked D T van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 49

Appendix

Wormhole switching and XY Routing

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

booked booked D T van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 50

Appendix

Wormhole switching and XY Routing

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

booked T van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 51

Appendix

Wormhole switching and XY Routing

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 52

Appendix

Circuit Switching

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 53

Appendix

Circuit Switching

req

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

m req

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 54

Appendix

Circuit Switching

req

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

m req req

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 55

Appendix

Circuit Switching

req

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

m req req req

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 56

Appendix

Circuit Switching

req

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

m req req req req

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 57

Appendix

Circuit Switching

ack

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

m req req req req req booked

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 58

Appendix

Circuit Switching

booked

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

m req req req req booked ack

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 59

Appendix

Circuit Switching

booked

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

m req req req booked ack booked

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 60

Appendix

Circuit Switching

booked

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

m req req booked ack booked booked

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 61

Appendix

Circuit Switching

booked

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

m req booked ack booked booked booked

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009

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SLIDE 62

Appendix

Circuit Switching

booked

local ports south north west east local ports south north west east local ports south north west east local ports south north west east 0 0 1 0 1 1 0 1

m booked ack booked booked booked booked

van den Broek et al. (RUN & OU ) Towards A Formally Verified NoC November 18, 2009