Seongil Im
E-mail: semicon@yonsei.ac.kr
- Lab. Website: Http://edlab.yonsei.ac.kr
2D FETs with MoS 2 , WSe 2 , and black phosphorous toward practical - - PowerPoint PPT Presentation
2D FETs with MoS 2 , WSe 2 , and black phosphorous toward practical electronics Seongil Im E-mail: semicon@yonsei.ac.kr Lab. Website: Http://edlab.yonsei.ac.kr Introduction The most widely studied 2-D material Conical Dirac spectrum Energy
E-mail: semicon@yonsei.ac.kr
The most widely studied 2-D material Conical Dirac spectrum Energy states without a bandgap High mobility (< 100000cm2/Vs) More conductive than copper Attractive optical phenomena
More Flexible than rubber Stretchable material Stronger than diamond Various formation (ribbon, tube, ball...)
Limitation of Graphene Gapless Band Structure → Unsuitable for switching devices
Transition Metal Dichalcogenides (MX2)
Similar storyline of the graphene family 2D and layered (thin-film) structures Covalently bonded X-M-X held together by Van der Waals interactions Broken symmetry in atomic basis can make Band Gap of ~ 1 eV
Nb
Metal Metal Metal
Ta
Metal Metal Metal
Mo
Semiconducting
(1L : 1.8eV , Bulk : 1.2eV)
Semiconducting
(1L : 1.5eV , Bulk : 1.1eV)
Semiconducting
(1L : 1.1eV , Bulk : 1.0eV)
W
Semiconducting
(1L : 1.9eV , Bulk : 1.4eV)
Semiconducting
(1L : 1.7eV , Bulk : 1.2eV)
Semiconducting
(1L : 1.1eV) modified version of Q. H. Wang et al. Nature Nanotech. 7, 699 (2012)
FET –countless many reports (e.g. A. Kis in Nat Nano. 2011)
and Threshold Voltage, ACS Nano, 9, 7019 (2015)
CMOS –several reports
pn diode-several reports
ACS Nano, 8, 8292 (2014) Nano Letters, 15, 4928 (2015)
l Introduction : Outline and Motivation l Progress on 2D Nanosheets in World Researches
§ Top-gate MoS2 FET, Nonvolatile Memory FETs and P-N diode § 2D-2D, 2D-1D, 2D-Organic Hybrid Complementary Inverter § Black Phosphorous Dual Gate FETs § NiOx-MoS2 van der Waals junction MESFET
§ Summary
Making on-state (accumulation) All interfacial (electron) traps are occupied…
Δ Vth (ε) ΔQeff = C ΔVth
ε (ε) V q C ε) (CBM D
th
it
¶ ¶ =
EV EFn Gate Dielectric n-channel e1 = hn1 e- EF e2 = hn2 e-
Dit: DOS of interfacial traps Modification of Qeff Result in Vth shift!!
Gate Voltage Drain Current
Initial (dark state)
e1 < e2
For n-channel FET (i. e. oxide semiconductor)
IGZO
Number
layer Trap density (X1012 cm-2) obtained from Hystere- sis PECCS Hysteresis & PECCS SS 2 1.92 1.00 2.92 6.67 3 1.26 1.15 2.41 7.10 4 2.47 1.37 3.84 7.69
1.Nanosheet Band-Gap & Thickness Modulation
MoS2 Nanosheet Phototransistors with Thickness-modulated Optical Energy Gap, Nano Lett. (2012)
Trap density probing on top-gate MoS2 Nanosheet field- effect transistors by photo-excited charge collection spectroscopy, Nanoscale (2015)
MoS2 Nanosheets for Top-Gate Nonvolatile Memory Transistor Channel, Small (2012)
Enhanced device performance of WSe2-MoS2 van der Waals junction p-n diode by fluoropolymer encapsulation, JMC C (2015)
5 10 15 20 10
10
10
10
10
10
10
10
10
10
erase
WR pulse ER pulse
VD = 1 V
Drain Current (A) Gate Voltage (V)
write
P . J. Jeon et al. ACS Appl. Mater. Interfaces, DOI: 10.1021/acsami.5b06027 (2015) P . J. Jeon et al. ACS Appl. Mater. Interfaces, DOI: 10.1021/acsami.5b06027 (2015) H.S. Lee et al. Small, 11, 2132 (2015) H.S. Lee et al. Small, 11, 2132 (2015)
Step4 | MoS2 transfer Step5 | WSe2 transfer Step6 | SD patterning
Step1 | Flake exfoliation Step2 | Alignment Step3 | Flake imprinting
10 μm MoS2 WSe2 Pt Au/Ti MoS2
WSe2
Transferred flakes
Transferred flakes
Source/Drain patterning Source/Drain patterning
(VTH=+5 V for p-WSe2, VTH=-15 V for n-MoS2)
WSe2 FET Transfer Curve MoS2 FET Transfer Curve
WSe2
10 μm
MoS2
0.0 0.5 1.0
0.0 0.2 0.4 0.6 0.8
Drain Voltage (V)
0.0 0.2 0.4 0.6 0.8
Drain Current (mA)
VG=-10 V VG=10 V |∆VG|=2 V WSe2 FET MoS2 FET
Output Curves
(not suitable for practical applications
due to overlap capacitance-induced booster effects VTC
1 2 3 4 5 Output Voltage (V) Input Voltage (V)
VDD=5 V VDD=1 V VDD=1~5 V 1 1 1 1 1 1 1 1 f=10 Hz
0.0 0.1 0.2 0.3 0.4 2 VOUT (V) Time (s)
VIN (V) Dynamic switching Complementary inverter
10
10
10 10
2
10
4
Power (nW) Input Voltage (V)
2 4 6 8 10 Input Voltage (V) Gain (-dVOUT/dVIN)
Gain Power
: Low operation voltage of VG=-5 ~ +5 V : Low gate-source leakage current of <100 fA
: Induced more hole carriers into thin p-WSe2 (positive VTH shift) : Reduced electrons in thin n-MoS2 (reduced on-current). WSe2 FET Transfer Curve MoS2 FET Transfer Curve Fluoropolymer CYTOP
CF2 CF O CF2 CF CF2 CF2
n
CYTOP
1 2 3
1 2 3 4 5
Output Voltage (V) Input Voltage (V)
10
10
10 10
2
10
4
Power (nW)
VDD=5 V VDD=4 V Pristine
1 2 3 4 5
1 2 3 4 5
Output Voltage (V) Input Voltage (V)
10
10
10 10
2
10
4
Power (nW)
VDD=5 V VDD=4 V CYTOP encapsulation
(VTR; 0.1 V → 2.3 V)
VTC before CYTOP VTC after CYTOP
f=500 Hz
10 20 30 2 VOUT (V) Time (ms)
VIN (V)
1 1
Dynamic Switching
3 V 0 V VIN VOUT A B VOUT B A VOUT
NOT gate NOT gate OR gate OR gate AND gate AND gate
(0) (1) NOT; (VIN)
5 10 15 20 1 2 3 Time (s) Output Voltage (V)
(0,0) (0,1) (1,0) (1,1) OR; (A,B)
10 20 30 40 1 2 3 Time (s) Output Voltage (V)
(0,0) (0,1) (1,0) (1,1) AND; (A,B)
10 20 30 40 1 2 3 Time (s) Output Voltage (V)
A B VOUT=A+B 1 1 1 1 1 1 1 A B VOUT=AxB 1 1 1 1 1
VIN VOUT 1 1
Highest gain and lowest power consumption for reported 2D material based inverter
Voltage gain of 60 and subnanowatt power consumption at static states
H.S. Lee et al. Small, 11, 2132 (2015) H.S. Lee et al. Small, 11, 2132 (2015)
Forecast some possibility to use 2D FET combined with Org. Elec. ?
Thickness ~ 12 nm
ambipolar transition voltage shifts from -0.5 to 1.5 V by applied top gate bias
NOR logic NOT logic
Well switching operated as Green, blue OLED pixel
Well switching operated as Green, blue OLED pixel
H.S. Lee et al. ACS Nano, 9, 8312, (2015) H.S. Lee et al. ACS Nano, 9, 8312, (2015)
“Thermally evaporated NiOx is known to have quite a deep work function of more than 5.1~5.2 eV as a Ni-rich semi-transparent conducting oxide (x~0.9).”
for the thinner MoS2
Energy band diagram Schottky diode IV curves
MESFET Transfer Curve Thickness dependency MESFET switching
, where
MESFET Mobility
5 10
6
6
6
6
1x10
6
2x10
6
3x10
6
4x10
6
200 K 220 K 240 K 260 K 280 K 300 K
RH(H) - RH(0) (W) H (T)
200 220 240 260 280 300 10
15
10
16
10
17
Nd (cm-3) Temperature (K)
5 10
0.0 0.1 0.2
RH(H) - RH(0) (M W) H (T)
300 K
MoS2 Hall Coeff-H(T) Curve MoS2 Nd conc. (T) plot
for 16 nm-thick MoS2 at 300 K
→
Saturation behavior in MESFET : easier channel-depletion (pinch-off) in drain side
“The carrier transport in MESFET may hardly be interfered by insulator-semiconductor interface traps or an on-state gate field.”
Parameters MESFET MISFET Subthreshold swing 83 mV/dec 200 mV/dec Mobility 950 cm2/V s 13 cm2/V s Hysteresis 0.06 V 8.56 V Threshold voltage
MESFET MISFET Photo-to-dark current ratio 2.85x103 1.4x102 Responsivity (ON state) 5000 A/W Responsivity (OFF state) 1.1 A/W Delay 2 ms 250 ms
§ 2D-FETs
analysis MoS2 band gap, nonvolatile memory, p-n diode
§ Hybrid complimentary Inverter: nW power, high gain
2D-2D, 2D-1D, 2D-Organic
§ Black Phosphorous Dual Gate FETs: High current, NOR gate
TG BG bipolar transition voltage shifts, OLED switching
§ NiOx-MoS2 van der Waals junction MESFET:
Intrinsic high mobility and photo-switching speed
FET
Nanoscale, 7, 5617 (2015)
High Mobility and Photoswitching Speed, ACS Nano, 9, 8312, (2015)
Nano letters, 15, 5778, (2015)
Hybrid (Complimentary) Inverter
Journal of Materials Chemistry C, 2, 6023, (2014)
Advanced Materials, 27, 150 (2015)
Small, 11, 2132 (2015)
and Light-Emitting Diode Circuits, ACS Appl. Mater. Interfaces, DOI: 10.1021/acsami.5b06027, (2015)
P-N and Schottky Diode
Journal of Materials Chemistry C, 3, 2751, (2015)
Memory FET
Journal of Materials Chemistry C, 2, 5411, (2014)
ACS Nano, DOI: 10.1021/acsnano.5b04592, (2015)
Collaboration Groups
Acknowledgement
National Research Laboratory: 2014R1A2A1A01004815, Nano-Materials Technology Development: 2012M3A7B4034985)
Future-leading Research Initiative of 2014: 2014-22-0168
E-mail: semicon@yonsei.ac.kr