28/09/2010 1
Oussama Elissati1,2, Eslam Yahya1,3, Sébastien Rieubon2, Laurent Fesquet1
1TIMA Lab. –
CIS Group, Grenoble, France
2ST-Ericsson, Grenoble, France 3Higher Institute of Technology,
Banha, Egypt
Optimizing and Comparing CMOS Implementations
- f the
C-element in 65nm Technology: Self-Timed Ring Case
CNRS - Grenoble-INP - UJF