Optimizing and Comparing CMOS Implementations of the C-element - - PowerPoint PPT Presentation

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Optimizing and Comparing CMOS Implementations of the C-element - - PowerPoint PPT Presentation

Optimizing and Comparing CMOS Implementations of the C-element in 65nm Technology: Self-Timed Ring Case Oussama Elissati 1,2 , Eslam Yahya 1,3 , Sbastien Rieubon 2 , Laurent Fesquet 1 1 TIMA Lab. CIS Group, Grenoble, France 2


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28/09/2010 1

Oussama Elissati1,2, Eslam Yahya1,3, Sébastien Rieubon2, Laurent Fesquet1

1TIMA Lab. –

CIS Group, Grenoble, France

2ST-Ericsson, Grenoble, France 3Higher Institute of Technology,

Banha, Egypt

Optimizing and Comparing CMOS Implementations

  • f the

C-element in 65nm Technology: Self-Timed Ring Case

CNRS - Grenoble-INP - UJF

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Oscillators and VCO

Oscillators are mandatory for :

  • Generating the clock synchronization signal.
  • Modulating and demodulating signals.
  • Retrieving signals in noise.
  • Communication applications :

Phase-Locked Loops (PLL) with strong requirements

  • n stability, phase noise and power consumption.

PATMOS 2010, Grenoble O.Elissati et al.

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Self-Timed Ring Oscillators

  • Well-suited

characteristics for managing process variability [Hamon 08]

  • Considered as promising solution for generating clocks.

[Fairbanks 04]

  • Generating

High-speed Multi-phase Clocks. [Elissati 10]

  • Offering an appropriate structure to limit the phase

noise.[Elissati 10]

PATMOS 2010, Grenoble O.Elissati et al.

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Outlines

1 Self-Timed Rings 2 C-element Implementations 3 Design of the ring stages 4 Simulation results 5 Conclusion

PATMOS 2010, Grenoble O.Elissati et al.

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Outlines

1 Self-Timed Rings 2 C-element Implementations 3 Design of the ring stages 4 Simulation results 5 Conclusion

PATMOS 2010, Grenoble O.Elissati et al.

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Self-Timed Ring

C C C C

Dff Drr

  • Tokens and bubbles
  • Propagation rules

1 ( 1)% ( 1)% token i i i L i i L bubble

Stage Stage C C C

− − +

⎯ ⎯⎯ → ⇔ ≠ = ← ⎯⎯ ⎯

T

1

T B

1 1

T B PATMOS 2010, Grenoble O.Elissati et al.

{ }

Bubble Stage C C

i 1 i i

= ⇒ =

+

{ }

Token Stage C C

i 1 i i

= ⇒ ≠

+

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The frequency depends on the initialization

1) .(R D 2. 1 F

OSC

+ =

( ) ( ) ( )

B T rr ff B T rr ff T B ff B T rr

N N D D if N N D D if N N , D N N , D R D, ≤ ≥ ⎩ ⎨ ⎧ =

The maximal frequency is reached when

B T rr ff

N N D D =

Self-Timed Ring

PATMOS 2010, Grenoble O.Elissati et al.

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Outlines

1 Self-Timed Rings 2 C-element Implementations 3 Design of the ring stages 4 Simulation results 5 Conclusion

PATMOS 2010, Grenoble O.Elissati et al.

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Dynamic Weak feed-back [Martin 89]

C-element implementations

Dynamic & Weak feed-back

PATMOS 2010, Grenoble O.Elissati et al.

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C-element implementations

Conventional & Symmetric Conventional [Sutherland 89] Symmetric [Berkel 94]

PATMOS 2010, Grenoble O.Elissati et al.

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Outlines

1 Self-Timed Rings 2 C-element Implementations 3 Design of the ring stages 4 Simulation results 5 Conclusion

PATMOS 2010, Grenoble O.Elissati et al.

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  • Optimize the stage speed (Logical, Electrical and Branching efforts)
  • The optimization of speed contribute to the phase noise reduction.

Cout =CR+CF F R

n

W ⋅ γ

n

W ⋅ γ

n

W U ⋅ ⋅γ

1 n

W U ⋅

1 n

W U ⋅ ⋅γ

2 n

W U ⋅

2

n

W

n

W

U1=0.89 U2=0.56

Design of the ring stages

Logical effort*

PATMOS 2010, Grenoble O.Elissati et al.

R F

*From [Sutherland 99]

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Design of the ring stages

Electrical simulations

Same figure shape whatever the implementation, the initialisation and the power consumption

PATMOS 2010, Grenoble O.Elissati et al.

2T/3B conventional implementation U1 U2

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Ring (conventional) Optimal frequency U1 U2 3 stages 1B/2T 1 0.9 4 stages 2B/2T 1 0.9 5 stages 1B/4T 1 0.9 5 stages 3B/2T 0.9 0.5

Design of the ring stages

Comparaison

Logical effort U1=0.89 U2=0.56

PATMOS 2010, Grenoble O.Elissati et al.

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Outlines

1 Self-Timed Rings 2 C-element Implementations 3 Design of the ring stages 4 Simulation results 5 Conclusion

PATMOS 2010, Grenoble O.Elissati et al.

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Power

Simulation results

Frequency vs. Power

2T/3B U1 et U2 optimal

PATMOS 2010, Grenoble O.Elissati et al.

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⎟ ⎠ ⎞ ⎜ ⎝ ⎛ + ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ − = mW P f f f L FOM

s m m

1 log 10 log 20 ) (

Simulation results

Figure of Merit (FOM)

PATMOS 2010, Grenoble O.Elissati et al.

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Outlines

1 Self-Timed Rings 2 C-element Implementations 3 Design of the ring stages 4 Simulation results 5 Conclusion

PATMOS 2010, Grenoble O.Elissati et al.

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Conclusions

  • A C-element implementation comparison in terms of:

speed, power and phase noise. What to keep in mind:

  • For high speed, low-power applications: use dymanic
  • r symmetric
  • For small area and low frequency: use conventional or weak feedback
  • For low-phase noise applications: avoid the weak feedback, prefer the

conventional

PATMOS 2010, Grenoble O.Elissati et al.

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References

PATMOS 2010, Grenoble O.Elissati et al. [Fairbanks 04]

  • S. Fairbanks and S. Moore, “Analog micropipeline

rings for high precision timing”, ASYNC’04, CRETE, Greece, IEEE, April 2004, pp. 41–50. [Hamon 08]

  • J. Hamon, L. Fesquet, B. Miscopein

and M. Renaudin “High-Level Time-Accurate Model for the Design of Self-Timed Ring Oscillators”, ASYNC’08, Newcastle, UK, IEEE, April 2008, pp. 29-38. [Elissati 00]

  • O. Elissati, E. Yahya, S. Rieubon, L. Fesquet

“High-Speed High_Resolution Low-Phase Noise Oscillator using Self-Timed Rings ”, IEEE/IFIP VLSI-SOC’2010, Septembre 27-29, 2010, Madrid, Spain. [Martin 89]

  • A. J. Martin, “Formal progress transformations for VLSI circuit

synthesis,” in Formal Development of Programs and Proofs E. W. Dijkstra, Ed. Reading, MA: Addison-Wesley, 1989, pp. 59–80. [Sutherland 89]

  • I. E. Sutherland, “Micropipelines,”
  • Commun. ACM, vol. 32,

pp.720–738, June 1989. [Berkel 94]

  • K. v. Berkel, R. Burgess, J. Kessels, A. Peeters, M. Roncken, and

F.Schalij, “A fully-asynchronous low-power error corrector for the DCC player,” IEEE J. Solid-State Circuits, vol. 29, pp. 1429–1439, Dec. 1994. [Sutherland 99]

  • I. Sutherland, B. Sproull, and D. Harris, Logical Effort: Designing

Fast CMOS Circuits. San Fransisco, CA: Morgan Kaufmann, 1999.

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Performances comparison

Phase noise

PATMOS 2010, Grenoble O.Elissati et al.