Switch-Mode Power Supplies Lesson 10: Introduction to - - PDF document

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Switch-Mode Power Supplies

Lesson 10: Introduction to Switched-Capacitor Converters

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Inductor Disadvantages

• Inductors have several disadvantages:

– High cost – Low power density – EMI Pollution – Large size – Discrete

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Steady State Operation Demands

• Duality:

– Inductor: Volt Sec. = 0 – Capacitor: Ampere Sec = 0

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Basic Example (1:1)

• The topology creates voltage balance
• Seemingly no straightforward regulation can

be done

S1 S2

Source Power stage Load

C IC

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Charge Profile (‘Complete Charge’)

• τ << Ts
• What are losses

dependent on? S1 ΔV Csw R

IC

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Charge Profile (‘Complete Charge’)

• Loss analysis can be done through energy

conservation equations

𝐹𝐷𝑇𝑋 = 𝐷ΔV2 2 𝐹1 = Δ𝑊𝐽 𝑢 𝑒𝑢

∞

= 𝐷Δ𝑊 𝑊 𝐷 𝑢 𝑒𝑢

∞

= 𝐷ΔV2

𝑄𝑚𝑝𝑡𝑡 = 2 𝐷ΔV2 2 𝑔

𝑡 = 𝐷ΔV2𝑔 𝑡

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Charge Profile (‘Complete Charge’)

• An average model can be then composed:

𝑆𝑓𝑟 = Δ𝑊2 𝑄 = 1 𝑔

𝑡𝐷

Load Req

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Charge profile (‘No-charge’)

• τ >> Ts
• Current can be

considered constant

• What are the losses

dependent on?

• Both sub-circuits are

literally the same and can be considered as

• ne

IC

S1 ΔV/2 Csw R

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Charge profile (‘No-charge’)

𝑄𝑀𝑝𝑡𝑡 = Δ𝑊 2

2

𝑆 𝑆𝑓𝑟 = 4𝑆

IC

S1 ΔV/2 Csw R Load Req

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Average Model

𝑆𝑓𝑟 = 1 2𝑔

𝑇𝐷1

⋅ coth 𝛾1 2

𝑆𝑓1

+ 1 2𝑔

𝑇𝐷2

⋅ coth 𝛾2 2

𝑆𝑓2

, 𝛾𝑗 = 𝑢𝑗 𝑆𝑗𝐷𝑗 ≈ 1 2𝑔

𝑡𝑆𝑗𝐷𝑗

𝑗 = 1,2

• A good 𝛾 is around

1 10 2 4 6 8 10

fs

t t i t i i

0.1

e R i * *

P.C 𝑆𝑓𝑗

∗ → 2

N.C C.C 𝑢𝑗 ≫ RiCi 𝑢𝑗 ≈ RiCi 𝑢𝑗 ≪ RiCi 𝑆𝑗 − charge/discharge Ohmic loop resistance 𝐷𝑗 − charge/discharge loop capacitance 𝑆𝑓𝑗

∗ = 𝑆𝑓𝑗

𝑆𝑗 𝑔

𝑡∗ = 𝑔 𝑡𝑆𝑗𝐷𝑗

Load Req

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Disadvantages

S1 S2

Vo VT RS

Conversion ratio impacts efficiency 𝜃 = 𝑊

𝑃/𝑊𝑈

IC Vds t P

Hard Switching raises RS Alon Cervera, Switch-Mode Power Supplies 11

Soft Switched SCC

• Utilizes the resonant characteristics of an RLC

branch

• Switch transition occurs at half resonance time

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#1 #2

T0/2 T0 V1 V2 VC t Vin Vout

#1 #2

𝑊

𝐷 𝑢 = 𝑊 𝑗 − Δ𝑊𝑓−𝛽𝑢 cos 𝜕0𝑢

The Capacitor Voltage and Currents for 𝑅 ≫ 1 will behave as following:

T0/2 T0 IC t

#1 #2

𝐽𝐷(𝑢) = 𝜕0𝐷 Δ𝑊𝑓−𝛽𝑢sin (𝜕0𝑢)

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How SSW-SCC works How SSW-SCC works

For 𝑅 ≫ 1 losses are negligible and at first break 𝑊

𝐷,1 ≈ 2𝑊 𝑗𝑜.

• 𝑊

𝑝 = 𝑊 𝑗𝑜: at second break 𝑊 𝐷 ≈ 0.

• 𝑊

𝑝 < 𝑊 𝑗𝑜: at second break 𝑊 𝐷 < 0.

– Next cycle: 𝑊

𝐷,1 > 2𝑊 𝑗𝑜

– The solution diverges, current increases, output voltage increases.

• 𝑊

𝑝 > 𝑊 𝑗𝑜: at second break 𝑊 𝐷 > 0.

– Next cycle: 𝑊

𝐷,1 > 2𝑊 𝑗𝑜 T0/2 T0 V1 V2 VC t Vin Vout

#1 #2 #1 #2

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𝜕0𝑗 = 1 𝑀𝑗𝐷𝑗 ; 𝑹𝒋 = 𝝏𝟏𝒋𝑴𝒋 𝑺𝒋 = 1 𝑆𝑗 𝑀𝑗 𝐷𝑗 𝜚𝑗 = 𝜌 2 ∙ 4𝑅𝑗

2 − 1

;

𝑗 = 1,2

Qi

5 10 2 2.5 3 3.5 1 3

*

e

R i

Soft Switched Capacitor Average Model

A good Q factor is around 1

𝑆𝑓𝑗

∗ = 𝑆𝑓𝑗

𝑆𝑗 𝑆𝑗 − charge/discharge Ohmic loop resistance 𝐷𝑗 − charge/discharge loop capacitance 𝑀𝑗 − charge/discharge loop inductance

𝑆𝑓 = 4𝑅1

2𝑆1 ⋅ 𝜚1 ⋅ tanh 𝜚1 𝑆𝑓1

+ 4𝑅2

2𝑆2 ⋅ 𝜚2 ⋅ tanh 𝜚2 𝑆𝑓2

Load Req

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