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TOTEM experiment Online Software chain: the role of the firmware in the TOTEM Scientific Computation. F.S. Cafagna 1 , A. Fierkolski 2 , M. Quinto 1,2 , E. Radicioni 1,2 INFN Bari unit, CERN On behalf of TOTEM Collaboration TOTEM Physics goals

SLIDE 1

TOTEM experiment Online Software chain: the role of the firmware in the TOTEM Scientific Computation.

F.S. Cafagna1, A. Fierkolski2,

M. Quinto1,2, E. Radicioni1,2

INFN Bari unit, CERN On behalf of TOTEM Collaboration

SLIDE 2

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 2

TOTEM Physics goals

TOTEM (TOTal cross section, Elastic

scattering and diffraction dissociation Measurement at the LHC)

TOT

pp with a precision ~ 1-2%, simultaneously measuring:

Nel down to -t ~10-3 GeV2
Ninel with losses < 3%
Elastic pp scattering in the range 10-3 < |t| ~ (p)2 < 10 GeV2
Soft diffraction (SD and DPE)
Particle flow in the forward region (cosmic ray MC validation/tuning)
TOTEM & CMS
Soft and hard diffraction in SD and DPE (production of jets, bosons,

h.f.)

Central exclusive particle production
Low-x physics
Particle and energy flow in the forward region

SLIDE 3

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 3

TOTEM Experiment

TOTEM

SLIDE 4

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 4

IP5

RP147 RP220 RP220

Roman Pots: measure elastic & diffractive protons close to outgoing beam

Inelastic telescopes: charged particle & vertex reconstruction in inelastic events

IP5 T1: 3.1 <  < 4.7 T2: 5.3 <  < 6.5

~ 10 m ~ 14 m

T1

CASTOR (CMS) HF (CMS)

T2 T2

T1: 18 – 90 mrad T2: 3 – 10 mrad

Experimental Setup @ IP5

CMS + TOTEM unprecedented  coverage

SLIDE 5

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 5

TOTEM F.E. block scheme

VFAT is a 128 channel trigger and tracking front-end ASIC.
A total of 2120 VFATs (960 RP, 480 T2, 680 T1). For

~233000 channels.

SLIDE 6

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 6

Overview of the DAQ chain

CMS DAQ TOTEM VME based standalone DAQ Detector FEs

SLIDE 7

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 7

The TOTFED

The TOTFED (TOTem Front End Driver) receives and handles data

from the detectors and provide interfaces to local and global DAQs and trigger systems.

Modular and flexible in design, hosts:
3 mezzanines for the OptoRX.
1 mezzanine for an S-link64 TX card.
1 mezzanine for a Front End Control (FEC) card.
A TTCrx chip to decode the TTC fast commands

and the global clock (both optical and electrical interfaces).

VME64x (using 1 Altera’s Cyclone FPGA)

and JTAG interfaces.

An interface to the Trigger Throttling

System (TTS)

4 Altera Stratix FPGA each connected

to 18 MB of the SRAM memory and an USB2.0 port.

3 FPGAs are connected to the OptoRX

mezzanine via a 192bit bus. 64 bits of these 3 busses are connected to the 4th.

SLIDE 8

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 8

The OptoRX

The Optical Link Interface (OptoRX), is equipped with an Altera

Stratix II GX, embedded with high-speed serial transceivers rated to work up to 6.375 Gbps.

Up to 12 fibers can be connected for a total of 192 channels (up to

16 VFAT for fiber).

This FPGA embedded deserializers provide built-in functions

compatible with the Gigabit Ethernet (8b/10b encoding) protocol used by the TOTEM FE optical transmitter: the GOL ASIC.

Hosts a mezzanine for a S-Link64 transmitter card
The OptoRX should:
receive and decode data from

an optical link with speed of 800 Mbps;

build the events according to

the CMS Common Data Format ;

support the local S-Link interface;
transmit data to the VME bus via

the TOTFED board;

provide back pressure signals (TTS);
perform data quality checks;

SLIDE 9

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 9

The TOTFED block scheme

To OptoRx(es)

Local Bus Clock, Fast commands, TTC, TTS Data Buses Control Buses VME32

SLIDE 10

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 10

The Opto-RX

S-Link packets builder Synchronization blocks

SLIDE 11

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 11

The Opto-RX

VME controled via MAIN control

bus. Same Local Bus protocol

DATA bus to MAIN or S-link mezanine using the same protocol VFAT frame emulator Clock lock checks. Recovered at the end of run

SLIDE 12

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 12

The OptoRX event builder

DATA bus to MAIN or S-link mezanine using the same protocol Check fiber requested and active OptoRx event counter compared to the L1A received from TTCrx S-Link CRC check

SLIDE 13

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 13

The MAIN

TOTFED Local Bus (VME) MAIN-OptoRX Local Bus MAIN-OptoRX Data Bus Trigger & OptoRX backpressure

SLIDE 14

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 14

The MAIN

Data Bus from OptoRX VME polling register and Data FIFO status

SLIDE 15

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 15

The CMS S-Link Data Format

SLIDE 16

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 16

The Data Structure

4 fiber bundle Single fiber Data

SLIDE 17

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 17

Conclusion

TOTEM extends over 440 meters and its readout electronics should

be interfaced to two different data acquisition system: VME and S- Link based.

Giving these requirements we designed the readout electronics

firmware as a smart glue logic and flexible pipeline between the detector front-end electronics and the online and event builder software chain. This design implementation is able to sustain the requested average trigger rates of 1kHz, in the standalone VME TOTEM DAQ.

Event data fragments, acquired with widely different latencies, are

synchronized and checked on board. In this way the online software can easily tag good events, ready for the track pattern recognition, increasing the efficiency of the offline software chain.

Thanks to the VFAT features and choosing the right fiber

configuration, a raw pattern recognition and more refined data quality checks can be implemented in the firmware leveraging the FPGA resources available on the TOTFED and OptoRX cards. THANKS!!!

SLIDE 18

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 18

Spares

SLIDE 19

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 19

The VFAT Emulator

SLIDE 20

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 20

Interface to the TTCrx

SLIDE 21

N68-04 F.S. Cafagna, IEEE NSS, Knoxville TN, 4th November 2010 21

TOTEM experiment Online Software chain: the role of the firmware in the TOTEM Scientific Computation.

F.S. Cafagna1, A. Fierkolski2,

INFN Bari unit, CERN On behalf of TOTEM Collaboration

TOTEM Physics goals

scattering and diffraction dissociation Measurement at the LHC)

h.f.)

TOTEM Experiment

TOTEM

IP5

RP147 RP220 RP220

Roman Pots: measure elastic & diffractive protons close to outgoing beam

IP5 T1: 3.1 <  < 4.7 T2: 5.3 <  < 6.5

T1

T2 T2

T1: 18 – 90 mrad T2: 3 – 10 mrad

Experimental Setup @ IP5

CMS + TOTEM unprecedented  coverage

TOTEM F.E. block scheme

~233000 channels.

Overview of the DAQ chain

CMS DAQ TOTEM VME based standalone DAQ Detector FEs

The TOTFED

from the detectors and provide interfaces to local and global DAQs and trigger systems.

and the global clock (both optical and electrical interfaces).

and JTAG interfaces.

System (TTS)

to 18 MB of the SRAM memory and an USB2.0 port.

mezzanine via a 192bit bus. 64 bits of these 3 busses are connected to the 4th.

The OptoRX

Stratix II GX, embedded with high-speed serial transceivers rated to work up to 6.375 Gbps.

16 VFAT for fiber).

compatible with the Gigabit Ethernet (8b/10b encoding) protocol used by the TOTEM FE optical transmitter: the GOL ASIC.

an optical link with speed of 800 Mbps;

the CMS Common Data Format ;

the TOTFED board;

The TOTFED block scheme

Local Bus Clock, Fast commands, TTC, TTS Data Buses Control Buses VME32

The Opto-RX

S-Link packets builder Synchronization blocks

The Opto-RX

VME controled via MAIN control

DATA bus to MAIN or S-link mezanine using the same protocol VFAT frame emulator Clock lock checks. Recovered at the end of run

The OptoRX event builder

DATA bus to MAIN or S-link mezanine using the same protocol Check fiber requested and active OptoRx event counter compared to the L1A received from TTCrx S-Link CRC check

The MAIN

TOTFED Local Bus (VME) MAIN-OptoRX Local Bus MAIN-OptoRX Data Bus Trigger & OptoRX backpressure

The MAIN

Data Bus from OptoRX VME polling register and Data FIFO status

The CMS S-Link Data Format

The Data Structure

4 fiber bundle Single fiber Data

Conclusion

be interfaced to two different data acquisition system: VME and S- Link based.

firmware as a smart glue logic and flexible pipeline between the detector front-end electronics and the online and event builder software chain. This design implementation is able to sustain the requested average trigger rates of 1kHz, in the standalone VME TOTEM DAQ.

synchronized and checked on board. In this way the online software can easily tag good events, ready for the track pattern recognition, increasing the efficiency of the offline software chain.

configuration, a raw pattern recognition and more refined data quality checks can be implemented in the firmware leveraging the FPGA resources available on the TOTFED and OptoRX cards. THANKS!!!

Spares

The VFAT Emulator

Interface to the TTCrx

VFAT

VFAT Data structure VFAT Control logic