Transistor bias circuits 1 Objectives Discuss the concept of dc - - PowerPoint PPT Presentation

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Transistor bias circuits 1 Objectives Discuss the concept of dc - - PowerPoint PPT Presentation

Chapter 5 Transistor bias circuits 1 Objectives Discuss the concept of dc biasing of a transistor for linear operation Analyze voltage-divider bias, base bias, emitter bias and collector-feedback bias circuits. and collector-feedback


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SLIDE 1

Chapter 5

Transistor bias circuits

1

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SLIDE 2

Objectives

  • Discuss the concept of dc biasing of a transistor for

linear operation

  • Analyze voltage-divider bias, base bias, emitter bias

and collector-feedback bias circuits. and collector-feedback bias circuits.

2

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SLIDE 3

Biasing

Biasing: The DC voltages applied to a transistor in

  • rder to turn it on so that it can amplify the AC

signal.

3

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SLIDE 4

Operating Point

The DC input establishes an operating or quiescent point called the Q- point.

4

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SLIDE 5

The Three States of Operation

  • Active or Linear Region Operation
  • Base–Emitter junction is forward biased Base–

Collector junction is reverse biased

  • Cutoff Region Operation

Base–Emitter junction is reverse biased

  • Base–Emitter junction is reverse biased
  • Saturation Region Operation
  • Base–Emitter junction is forward biased Base–

Collector junction is forward biased

5

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SLIDE 6

DC Biasing Circuits

  • Fixed-bias circuit
  • Emitter-stabilized bias circuit
  • Collector-emitter loop
  • Voltage divider bias circuit
  • Voltage divider bias circuit
  • DC bias with voltage feedback

6

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SLIDE 7

Fixed Bias

7

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SLIDE 8

The Base - Emitter Loop

From Kirchhoff’s voltage law:

+VCC – IBRB – VBE = 0

Solving for base current: Solving for base current:

B

− VBE VCC R I B = = = =

8

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SLIDE 9

Collector-Emitter Loop

Collector current: I = = = = β β β βIB C From Kirchhoff’s voltage law: VCE = = = = VCC − − − − ICRC

9

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SLIDE 10

Saturation

When the transistor is operating in saturation, current through the transistor is at its maximum possible value.

VCC I Csat = = = = R Csat R C

VCE ≅ ≅ ≅ ≅ 0 V

10

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SLIDE 11

Load Line Analysis

The end points of the load line are: ICsat

IC = VCC / RC VCE = 0 V

VCEcutoff VCEcutoff

VCE = VCC

IC = 0 mA The Q-point is the operating point:

  • where the value of RB sets the value
  • f IB
  • that sets the values of VCE and IC

11

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SLIDE 12

Circuit Values Affect the Q-Point

12

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SLIDE 13

Circuit Values Affect the Q-Point

13

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SLIDE 14

Circuit Values Affect the Q-Point

14

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SLIDE 15

Emitter-Stabilized Bias Circuit

Adding a resistor (RE) to the emitter circuit stabilizes the bias circuit.

15

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SLIDE 16

Base-Emitter Loop

From Kirchhoff’s voltage law:

+ VCC - IERE - VBE - IERE = = = =0

Since IE = (β β β β + 1)IB:

VCC - IBRB - (β β β β + + + +1)IBRE = = = = 0 VCC - IBRB - (β β β β + + + +1)IBRE = = = = 0

Solving forIB:

E B

VCC - VBE + + + + (β β β β + + + +1)R IB = = = = R

16

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SLIDE 17

Collector-Emitter Loop

From Kirchhoff’s voltage law:

CE C C CC + I R − V =0 IERE + V

Since IE ≅ ≅ ≅ ≅ IC:

VCE = = = = VCC – IC(RC + + + + RE ) VCE = = = = VCC – IC(RC + + + + RE )

Also:

VE = = = = IERE VC = = = = VCE + + + + VE = = = = VCC - ICRC VB = = = = VCC – IRRB = = = = VBE + + + + VE

17

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SLIDE 18

Improved Biased Stability

Stability refers to a circuit condition in which the currents and voltages will remain fairly constant over a wide range of temperatures and transistor Beta (β β β β) values. Adding RE to the emitter improves the stability of a transistor.

18

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SLIDE 19

Saturation Level

The endpoints can be determined from the load line.

VCEcutoff: ICsat:

VCE = = = = VCC IC = = = = 0mA

VCC RC + + + + R IC = = = =

VCE = = = = 0 V

19

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SLIDE 20

Voltage Divider Bias

This is a very stable bias circuit. The currents and The currents and voltages are nearly independent of any variations in β β β β.

20

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SLIDE 21

Approximate Analysis

Where IB << I1 and I1 ≅ ≅ ≅ ≅ I2:

2 1 B

R + + + + R R2VCC V = = = =

Where β β β βRE > 10R2:

I = = = = VE

E E

R VE = = = = VB − − − − VBE

From Kirchhoff’s voltage law:

VCE = VCC − ICRC −IERE

IE ≅ IC VCE =VCC−IC(RC + RE )

21

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SLIDE 22

Voltage Divider Bias Analysis

Transistor Saturation Level VCC I

E C

= = = = ICmax = = = =

Csat

R + + + + R Load LineAnalysis Load LineAnalysis Cutoff: Saturation:

VCE = = = = VCC IC = = = = 0mA

CE VCC RC + + + + RE

V = = = = 0V

IC = = = =

22

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SLIDE 23

DC Bias with Voltage Feedback

Another way to improve the stability

  • f a bias

circuit is to add a feedback path from collector to base. collector to base. In this bias circuit the Q- point is only slightly dependent

  • n

the transistor beta, β β β β.

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SLIDE 24

Base-Emitter Loop

From Kirchhoff’s voltage law:

VCC – I′ ′ ′ ′CRC – IBRB – VBE – IERE = = = = 0

Where IB << IC:

C I' = IC + IB ≅IC

Knowing I = β β β βI and I ≅ ≅ ≅ ≅ I , the loop Knowing IC = β β β βIB and IE ≅ ≅ ≅ ≅ IC, the loop equation becomes:

VCC – β β β βIBRC − − − − IBRB − − − − VBE − − − − β β β βIBRE = = = = 0

Solving for IB:

RB + + + + β β β β(RC + + + + RE) VCC − − − − VBE IB = = = =

24

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SLIDE 25

Collector-Emitter Loop

Applying Kirchoff’s voltage law: IE + VCE + I’CRC – VCC =0 Since I′′ ′′ ′′ ′′C ≅ ≅ ≅ ≅ IC and IC = β β β βIB: IC(RC + RE) + VCE – VCC=0 Solving forVCE: VCE = VCC – IC(RC + RE)

25

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SLIDE 26

Base-Emitter BiasAnalysis

Transistor Saturation Level

E C Csat

VCC I R + + + + R = = = = ICmax = = = = Load LineAnalysis Cutoff: Saturation:

V

= VCC VCE IC = 0mA

E C C I

VCE = 0 V

R + R = CC

26

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SLIDE 27

PNP Transistors

The analysis for pnp transistor biasing circuits is the same as that for npn transistor circuits. The only difference isthat the currents are flowing in the opposite direction.

27

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SLIDE 28

Base voltage Emitter voltage

  • Analysis of Voltage Bias for PNP

Transistor

EE E DC B

V R R R R V

  • +

= β β β β

2 1 1

BE B E

V V V + = V R I R I V V + + + =

By Ohm’s Law, And,

DC B E BE B EE E

R R V V V I β + − − =

E E C C CC EC C C C

R I R I V V R I V − − = =

BE E E B B B EE

V R I R I V V + + + =

28

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SLIDE 29

Evaluate IC and VEC for pnp transistor circuit in Figure below.

Given VEE = +15V, R1 = 63kΩ, R2 = 27kΩ, RC = 1.8kΩ, RE = 2.6kΩ, βDC =120.

Example 1

29

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SLIDE 30

Figure below shown the schematic with a negative supply

voltage, determine IC and VCE for a pnp transistor circuit with given values: R1 = 25kΩ, R2 = 60kΩ, RC = 6kΩ, RE = 9kΩ, VCC = -12V, and βDC = 90

Example 2

30

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SLIDE 31

Construct a complete circuit required to replace the transistor in

Figure below with a pnp transistor. Given VCC = 10V, R1 = 78kΩ, R2 = 100kΩ, RC = 18kΩ, RE = 8kΩ.

Example 3

31