One of the major challenges in the design and verification of - - PowerPoint PPT Presentation

one of the major challenges in the design and
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One of the major challenges in the design and verification of - - PowerPoint PPT Presentation

One of the major challenges in the design and verification of manycore systems is cache coherency. In bus-based architectures, this is a well-studied problem. When replacing the bus by a communication network, however, new problems arise.


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One of the major challenges in the design and verification of manycore systems is cache coherency. In bus-based architectures, this is a well-studied problem. When replacing the bus by a communication network, however, new problems

  • arise. Cross-layer deadlocks can occur even when the

protocol and the network are both deadlock-free when considered in isolation. To counter this problem, we propose a methodology for deriving cross-layer invariants. These invariants relate the state of the protocols run by the cores to the state of the communication network. We show how they can be used to prove the absence of cross-layer deadlocks. Our approach is generally applicable and shows promising scalability.

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CROSS-LAYER INVARIANTS FOR NOCS

Freek Verbeek, Pooria Mohammadi Yaghini, Ashkan Eghbal and Nader Bagherzadeh

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Cache Coherence & Singlecore

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Cache Coherence & Multicore

edacafe.com

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✖ = req u= ack

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✖ ✖ = req u= ack

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✖ = req u= ack

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u ✖ = req u= ack

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✖ = req u= ack

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✖ = req u= ack

Deadlock?

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✖ = req u= ack

Deadlock?

u u ✖ ✖

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Example: cross-layer deadlock

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Example: cross-layer deadlock

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Example: cross-layer deadlock

get

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Example: cross-layer deadlock

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inv

Example: cross-layer deadlock

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put

Example: cross-layer deadlock

inv

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Example: cross-layer deadlock

inv ack

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Deadlock Detection

  • 1. Model protocol + interconnect
  • 2. Overapproximate deadlocks
  • 3. Use invariants to rule out unreachable deadlocks
  • 4. Use SMT solver to prove deadlock-freedom or find

possible deadlock

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1.) Overapproximate deadlocks

s0 ∧ #q0 = q0.size ∧ t1 ∧ #q1 = q1.size s1 ∧ #q1 = 0 ∧ t0 ∧ #q0 = 0∧

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2.) Derive invariants

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3.) Use SMT solver

s0 ∧ #q0 = q0.size ∧ t1 ∧ #q1 = q1.size s1 ∧ #q1 = 0 ∧ t0 ∧ #q0 = 0∧

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Case Study: 2D mesh, XY routing, MI cache coherence protocol

Interconnect:

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Protocol:

L2 caches Directory

Case Study: 2D mesh, XY routing, MI cache coherence protocol

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Case Study: 2D mesh, XY routing, MI cache coherence protocol

Router MI Cache Core Router MI Directory Core

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Experimental Results

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Case Study: 2D torus with ring, XY routing, snoopy cache coherence protocol

Interconnect: Protocol:

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Experimental Results

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Deadlock Detection

  • 1. Model protocol + interconnect
  • 2. Overapproximate deadlocks
  • 3. Use invariants to rule out unreachable deadlocks
  • 4. Use SMT solver to prove deadlock-freedom or find

possible deadlock

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Modelling…

… the interconnect

  • xMAS
  • graphical language
  • formal semantics:

trdy/irdy/data signals

... the protocol

  • IO automata
  • events and transformations
  • formal semantics:

trdy/irdy/data signals

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Semantics

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Invariant Generation

  • 1. The sum of firing ingoing transitions equals the sum of

firing outgoing transitions. Example:

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Invariant Generation

Let be a partitioning of all pairs such that:

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Invariant Generation

  • 2. The sum of incoming packets equals the number of

times a transition fired that consumes such a packet. Example:

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Conclusion

  • Methodology for finding cross-layer deadlocks
  • Makes use of cross-layer invariants
  • Monolithic verification of protocol and interconnect
  • generic w.r.t. interconnect
  • generic w.r.t. protocol
  • Fully automated
  • Haskell implementation of invariant generation, deadlock detection,

and various required paraphernalia